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Henner Zeller 2015-07-19 17:18:45 -07:00
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230
README.md
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@ -10,6 +10,8 @@ GNU General Public License Version 2.0 <http://www.gnu.org/licenses/gpl-2.0.txt>
The example code using this library is released in the public domain.
## NOTE the pinout changed on 2015-07-19 to provide more glitch-free output. If you have an existing wiring, provide -DRGB_CLASSIC_PINOUT to the compilation or consider changing the wiring as it provides a much more stable image.
Overview
--------
The 32x32 or 16x32 RGB LED matrix panels can be scored at [Sparkfun][sparkfun],
@ -72,84 +74,49 @@ e.g. using the [active adapter PCB](./adapter/).
Since we only need output pins on the RPi, we don't need to worry about level
conversion back.
For a single chain of LED-panels, we need 13 IO pins. It will work on all
Rasperry Pis, including the first board revision of the Raspberry Pi 1.
For a single chain of LED-panels, we need 13 IO pins, which fit all in the
header of the old Raspberry Pis. Newer Raspberry Pis have 40 GPIO pins which allows
us to connect three parallel chains of RGB panels.
LED-Panel to GPIO:
* GND (Ground, '-') to ground of your Raspberry Pi (Pin 25 on RPi-header)
* R1 (Red 1st bank) : GPIO 17 (Pin 11 on RPi header)
* G1 (Green 1st bank) : GPIO 18 (Pin 12 on RPi header)
* B1 (Blue 1st bank) : GPIO 22 (Pin 15 on RPi header)
* R2 (Red 2nd bank) : GPIO 23 (Pin 16 on RPi header)
* G2 (Green 2nd bank) : GPIO 24 (Pin 18 on RPi header)
* B2 (Blue 2nd bank) : GPIO 25 (Pin 22 on RPi header)
* A, B, C, D (Row address) : GPIO 7, 8, 9, 10 (Pins 26, 24, 21, 19
on RPi-header)
(Note: there is no need for `D` needed if you have a display with 16 rows
with 1:8 multiplexing)
* OE- (neg. Output enable) : GPIO 27 (Pin 13 on RPi header) **(Note, this changed from previous versions of this library)**.
On a Raspberry Pi 1 Revision 1 (really old), this is on GPIO 0, Pin 3.
* CLK (Serial clock) : GPIO 11 (Pin 23 on RPi header) **(Note, this changed from previous versions of this library)**
* STR (Strobe row data) : GPIO 4 (Pin 7 on RPi header)
Here is an illustration of the different Raspberry Pi headers for reference.
For reference, this is how the numbering on the Raspberry Pi looks like:
<a href="img/raspberry-gpio.jpg"><img src="img/raspberry-gpio.jpg" width="600px"></a>
Left: Raspberry Pi 1, on the right Raspberry Pi 1 B+ or Raspberry Pi 2.
Or check <http://elinux.org/RPi_Low-level_peripherals> for details of available
GPIOs and pin-header.
This is the same representation as in the table below, which allows nice visual inspection.
Note, each panel has an output that allows you to daisy-chain it to the next
board (see section about chaining below).
If you are using only 1 bit pwm (`-p 1` flag), then this can be a very long
chain. Though full color pwm (color images), the refresh rate goes down
considerably after 6-8 boards.
For each of the up to three chains, you have to connect GND, strobe,
clock, OE, A, B, C, D to all of these; you find the positions below (note there are more GND
pins on the Raspberry Pi, but for simplicity, they are left out; The `---` are not connected).
Then for each panel, there is a set of (R1, G1, B1, R2, G2, B2) that you have
to connect to the places marked `[1]`, `[2]` and `[3]` for chain 1, 2, and 3.
To make things quicker to see visually, I've marked each chain with a separate
icon `[1]`=:smile:, `[2]`=:boom: and `[3]`=:droplet:.
### Up to 3 Panels with newer Raspberry Pis with 40 GPIO pins! ###
If you have one of the newer plus models of the Raspberry Pi 1 or the
Raspberry Pi2, you can control **up to three chains** in parallel. This does not
cost more CPU, so is essentially coming for free (except that your code
needs to generate more pixels of course). For the same number of panels,
always prefer parallel chains before daisy chaining more panels, as it will
keep the refresh-rate higher.
Connection | Pin | Pin | Connection
----------------:|:---:|:---:|:-----------
--- | 1 | 2 | ---
:droplet:`[3] G1`| 3 | 4 | ---
:droplet:`[3] B1`| 5 | 6 | GND
strobe | 7 | 8 | `[3] R1` :droplet:
--- | 9 | 10 | ---
clock | 11 | 12 | OE
:smile: `[1] G1`| 13 | 14 | ---
A | 15 | 16 | B
--- | 17 | 18 | C
:smile: `[1] B2`| 19 | 20 | ---
:smile: `[1] G2`| 21 | 22 | D
:smile: `[1] R1`| 23 | 24 | `[1] R2` :smile:
--- | 25 | 26 | `[1] B1` :smile:
--- | 27 | 28 | ---
:boom: `[2] G1`| 29 | 30 | ---
:boom: `[2] B1`| 31 | 32 | `[2] R1` :boom:
:boom: `[2] G2`| 33 | 34 | ---
:boom: `[2] R2`| 35 | 36 | `[3] G2` :droplet:
:droplet:`[3] R2`| 37 | 38 | `[2] B2` :boom:
--- | 39 | 40 | `[3] B2` :droplet:
For multiple parallel boards to work, you have to uncomment
#DEFINES+=-DSUPPORT_MULTI_PARALLEL # remove the '#' in the begging
in [lib/Makefile](./lib/Makefile).
If you only use two panels, you will be able to use I²C and the serial line
connectors on the Raspberry Pi. With three panels, these pins will be used up
as well.
The second and third panel chain share some of the wires of the first panel:
connect **GND, A, B, C, D, OE, CLK** and **STR** to the same pins you already
connected the first panel.
Then connect the following
### Second panel ###
* R1 (Red 1st bank) : GPIO 12 (Pin 32 on RPi header)
* G1 (Green 1st bank) : GPIO 5 (Pin 29 on RPi header)
* B1 (Blue 1st bank) : GPIO 6 (Pin 31 on RPi header)
* R2 (Red 2nd bank) : GPIO 19 (Pin 35 on RPi header)
* G2 (Green 2nd bank) : GPIO 13 (Pin 33 on RPi header)
* B2 (Blue 2nd bank) : GPIO 20 (Pin 38 on RPi header)
### Third panel ###
The third panel will use some pins that are otherwise used for I²C and the
serial interface. If you don't care about these, then we can use these to
connect a third chain of panels.
* R1 (Red 1st bank) : GPIO 14, also TxD (Pin 8 on RPi header)
* G1 (Green 1st bank) : GPIO 2, also SDA (Pin 3 on RPi header)
* B1 (Blue 1st bank) : GPIO 3, also SCL (Pin 5 on RPi header)
* R2 (Red 2nd bank) : GPIO 15, also RxD (Pin 10 on RPi header)
* G2 (Green 2nd bank) : GPIO 26 (Pin 37 on RPi header)
* B2 (Blue 2nd bank) : GPIO 21 (Pin 40 on RPi header)
In the [adapter/](./adapter) directory, there are some boards that make
the wiring task simpler.
Running
-------
@ -359,6 +326,45 @@ Or, if you are lazy, just import the whole namespace:
Read the [`minimal-example.cc`](./minimal-example.cc) to get started, then
have a look into [`demo-main.cc`](./demo-main.cc).
Help, some pixels are not displayed properly
--------------------------------------------
Some panels don't handle the 3.3V logic level well, in particular with
faster Raspberry Pis Version 2. This results in artifacts like randomly
showing up pixels or parts of the panel showing 'static'.
If you encounter this, try these things
- Make sure to have as short as possible flat-cables connecting your
Raspberry Pi with the LED panel.
- Use an adapter board with a bus-driver that acts as level shifter between
3.3V and 5V. You can find [active adapter PCBs](./adapter/) in a
subdirectory of this project.
- If you can't implement the above things, or still have problems, you can
slow down the GPIO writing a bit. This will of course reduce the
frame-rate, so it comes at a cost.
For GPIO slow-down, uncomment the following line in [lib/Makefile](lib/Makefile)
#DEFINES+=-DRGB_SLOWDOWN_GPIO # remove '#' in the beginning
Then `make clean` and `make` again.
Inverted Colors ?
-----------------
There are some displays out there that use inverse logic for the colors. You
notice that your image looks like a 'negative'. In that case, uncomment the
folling `DEFINES` line in [lib/Makefile](./lib/Makefile) by removing the `#`
at the beginning of the line.
#DEFINES+=-DINVERSE_RGB_DISPLAY_COLORS # remove '#' in the beginning
Then, recompile
make clean
make
A word about power
------------------
@ -424,46 +430,6 @@ guidelines:
- If you still see noise, increase the voltage sligthly above 5V. But note,
this is typically only a symptom of too thin traces.
Help, some pixels are not displayed properly
--------------------------------------------
Some panels don't handle the 3.3V logic level well, in particular with
faster Raspberry Pis Version 2. This results in artifacts like randomly
showing up pixels or parts of the panel showing 'static'.
If you encounter this, try these things
- Make sure to have as short as possible flat-cables connecting your
Raspberry Pi with the LED panel.
- Use an adapter board with a bus-driver that acts as level shifter between
3.3V and 5V. You can find [active adapter PCBs](./adapter/) in a
subdirectory of this project. Also, Adafruit made a HAT that has level
shifters.
- If you can't implement the above things, or still have problems, you can
slow down the GPIO writing a bit. This will of course reduce the
frame-rate, so it comes at a cost.
For GPIO slow-down, uncomment the following line in [lib/Makefile](lib/Makefile)
#DEFINES+=-DRGB_SLOWDOWN_GPIO # remove '#' in the beginning
Then `make clean` and `make` again.
Inverted Colors ?
-----------------
There are some displays out there that use inverse logic for the colors. You
notice that your image looks like a 'negative'. In that case, uncomment the
folling `DEFINES` line in [lib/Makefile](./lib/Makefile) by removing the `#`
at the beginning of the line.
#DEFINES+=-DINVERSE_RGB_DISPLAY_COLORS # remove '#' in the beginning
Then, recompile
make clean
make
Technical details
-----------------
@ -499,39 +465,23 @@ areas of your picture.
(Even with realtime extensions enabled in Linux, this is still a (smaller)
problem).
The timing of the Output Enable pin has to be very accurate otherwise you'll
see brightness glitches. We are using the PWM hardware of the Raspberry Pi to
provide such accurate timing.
Limitations
-----------
If using higher resolution color (This code supports up to 24bpp @3x11 bit PWM),
you will see dynamic glitches - lines that flicker and randomly look a bit
brighter. At lower bit PWM between <= 4, this is typically not visible.
If you are using the RGB_CLASSIC_PINOUT, then we can't make use of the PWM
hardware (which only outputs to a particular pin), so you'll see random
brightness glitches. I strongly suggest to change to the now
default pinout.
This is due to the fact that we have to do the PWM ourselves and for
high-resolution PWM, the smallest time-period is around 200ns. We would need
hard real-time requirements of the operating system of << 200ns.
Even for realtime environments, that is pretty tough.
We're running this on a general purpose computer with no dedicated
realtime hardware (such as dedicated, separate realtime core(s) we could use
on the BeagleBone Black). Linux does provide some support for realtime
applications, but the latency goals here are in the tens of microseconds at
best. Even with realtime-patches applied (I tried the
[RPi wheezy image provided by Emlid][emlid-rt]), this does not make much of
a dent.
The system needs constant CPU to update the display. Using the DMA controller
was considered but after extensive experiments ( https://github.com/hzeller/rpi-gpio-dma-demo )
dropped due to its slow speed..
According to the paper [How fast is fast enough? Choosing between Xenomai and
Linux for real-time applications][rt-paper], it might pay off to move the display
update part to the kernel. Future TODO.
(One experiment already done was to use the DMA controller of the RPi to make
use of dedicated hardware. However, it turns out that the DMA controller was
slower writing data than using GPIO directly. But maybe it might be worthwile if
it turns out to have more stable realtime properties.)
There seems to be a limit in how fast the GPIO pins can be controlled.
We get about 10Mhz clock speed out of GPIO clocking. Do do things correctly,
we would have to take the time it takes to clock a row in as essentially the
lowest PWM time (~3.4µs).
However, we just ignore this 'black' time, and switch the row on and off after
the clocking with the needed time-period; that way we get down to 200ns.
There seems to be a limit in how fast the GPIO pins can be controlled, which
limits the frame-rate.
[hub75]: ./img/hub75.jpg
[hub75-arrow]: ./img/hub75-other.jpg

19
adapter/README.md
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@ -1,21 +1,16 @@
PCB adapter for Raspberry Pi to Hub75 RGB Matrixes
==================================================
**(Note: I am working on a change in the pinout to better accomodate various constraints.
Please contact me if you intend to build and adapter, maybe it makes sense to wait a week).**
Since hand-wiring can be a little tedious, here are some PCBs that help
with the wiring when using the `rpi-rgb-led-matrix` code.
* [Passive](./passive) is the simplest one, directly wiring the GPIO pins
to the Hub75 IDC connectors for up to two parallel chains (for
40 GPIO pin Raspberry Pis. Older 26 GPIO pin Raspberry Pis can connect
to one chain).
* [Active](./active) Similar to the passive PCB, but does level
shifting 3.3V -> 5V and provides convenient breakouts for I²C and serial.
* [Active3](./active-3) Like the active board, but supports three parallel
chains with level shifting. Due to the additional amount of GPIO pins
needed, I²C and serial can't be used when all three ports are used.
* [Passive-3](./passive-3) Supports three parallel chains, directly connected
to the output of a Rapsberry Pi with 40 GPIO pins. Works, but usually it is better to
buffer the outputs using the ...
* [Active-3](./active-3) board. Supports three parallel chains with active buffering
and 3.3V -> 5V level shifting for best reliability. Requires SMD soldering.
* The [Passive-RPi1](./passive-rpi1) adapter board is to connect one panel to
Raspberry Pi 1 with 26 GPIO pins.
![Three Panels connected][three-panels]

19
adapter/active-3/README.md
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@ -1,22 +1,23 @@
Adapter PCB to support up to 3 panels
======================================
* Supports one panel for Raspberry PIs with 26 GPIO pins up to three
panel chains for newer plus models and Raspberry Pi 2 that have 40 GPIO pins.
* Supports up to three panel chains for newer plus models and
Raspberry Pi 2 that have 40 GPIO pins.
* Uses HCT245 to level shift signals from 3.3V to 5V and shield
the Raspberry Pi GPIOs from overloading.
* Open source KiCAD PCB EDA format.
* (not very pretty layout, was just lazy and let the auto-router do it).
For multiple parallel boards to work, you have to uncomment
#DEFINES+=-DSUPPORT_MULTI_PARALLEL # remove the '#' in the begging
in [lib/Makefile](../../lib/Makefile).
* BOM:
- 4x HCT245 in 20-SOIC (7.5mm package)
- 4x 100nF ceramic capacitor
- 3x 16pin IDC (=2x8) male receptible to connect the panels.
- 1x 40pin female connector to connect to the RPi.
You can [buy the board from OSH Park][osh-active3].
![Preview][rendering]
[rendering]: ../../img/active3-pcb.png
[osh-active3]: https://oshpark.com/shared_projects/D2hXjnYT
[osh-active3]: https://oshpark.com/shared_projects/fIYlJxnA

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adapter/active-3/active3-rpi-hub75-adapter-cache.lib Normal file
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@ -0,0 +1,249 @@
EESchema-LIBRARY Version 2.3
#encoding utf-8
#
# 74LS245
#
DEF 74LS245 U 0 10 Y Y 1 F N
F0 "U" 100 575 60 H V L BNN
F1 "74LS245" 50 -575 60 H V L TNN
F2 "" 0 0 60 H V C CNN
F3 "" 0 0 60 H V C CNN
ALIAS 74HC245
DRAW
X GND 10 0 -550 0 U 60 60 0 0 W N
X VCC 20 0 550 0 D 60 60 0 0 W N
S -400 550 400 -550 0 1 0 N
P 3 0 1 0 50 100 0 -100 -100 -100 N
P 4 0 1 0 100 100 -50 100 -100 -100 -150 -100 N
X A->B 1 -700 -400 300 R 60 60 1 1 I
X A0 2 -700 500 300 R 60 60 1 1 T
X A1 3 -700 400 300 R 60 60 1 1 T
X A2 4 -700 300 300 R 60 60 1 1 T
X A3 5 -700 200 300 R 60 60 1 1 T
X A4 6 -700 100 300 R 60 60 1 1 T
X A5 7 -700 0 300 R 60 60 1 1 T
X A6 8 -700 -100 300 R 60 60 1 1 T
X A7 9 -700 -200 300 R 60 60 1 1 T
X B7 11 700 -200 300 L 60 60 1 1 T
X B6 12 700 -100 300 L 60 60 1 1 T
X B5 13 700 0 300 L 60 60 1 1 T
X B4 14 700 100 300 L 60 60 1 1 T
X B3 15 700 200 300 L 60 60 1 1 T
X B2 16 700 300 300 L 60 60 1 1 T
X B1 17 700 400 300 L 60 60 1 1 T
X B0 18 700 500 300 L 60 60 1 1 T
X CE 19 -700 -500 300 R 60 60 1 1 I I
ENDDRAW
ENDDEF
#
# C
#
DEF C C 0 10 N Y 1 F N
F0 "C" 25 100 50 H V L CNN
F1 "C" 25 -100 50 H V L CNN
F2 "" 38 -150 30 H V C CNN
F3 "" 0 0 60 H V C CNN
$FPLIST
C?
C_????_*
C_????
SMD*_c
Capacitor*
$ENDFPLIST
DRAW
P 2 0 1 20 -80 -30 80 -30 N
P 2 0 1 20 -80 30 80 30 N
X ~ 1 0 150 110 D 40 40 1 1 P
X ~ 2 0 -150 110 U 40 40 1 1 P
ENDDRAW
ENDDEF
#
# CONN_02X08
#
DEF CONN_02X08 P 0 1 Y N 1 F N
F0 "P" 0 450 50 H V C CNN
F1 "CONN_02X08" 0 0 50 V V C CNN
F2 "" 0 -1200 60 H V C CNN
F3 "" 0 -1200 60 H V C CNN
$FPLIST
Pin_Header_Straight_2X08
Pin_Header_Angled_2X08
Socket_Strip_Straight_2X08
Socket_Strip_Angled_2X08
$ENDFPLIST
DRAW
S -100 -345 -50 -355 0 1 0 N
S -100 -245 -50 -255 0 1 0 N
S -100 -145 -50 -155 0 1 0 N
S -100 -45 -50 -55 0 1 0 N
S -100 55 -50 45 0 1 0 N
S -100 155 -50 145 0 1 0 N
S -100 255 -50 245 0 1 0 N
S -100 355 -50 345 0 1 0 N
S -100 400 100 -400 0 1 0 N
S 50 -345 100 -355 0 1 0 N
S 50 -245 100 -255 0 1 0 N
S 50 -145 100 -155 0 1 0 N
S 50 -45 100 -55 0 1 0 N
S 50 55 100 45 0 1 0 N
S 50 155 100 145 0 1 0 N
S 50 255 100 245 0 1 0 N
S 50 355 100 345 0 1 0 N
X P1 1 -250 350 150 R 50 50 1 1 P
X P2 2 250 350 150 L 50 50 1 1 P
X P3 3 -250 250 150 R 50 50 1 1 P
X P4 4 250 250 150 L 50 50 1 1 P
X P5 5 -250 150 150 R 50 50 1 1 P
X P6 6 250 150 150 L 50 50 1 1 P
X P7 7 -250 50 150 R 50 50 1 1 P
X P8 8 250 50 150 L 50 50 1 1 P
X P9 9 -250 -50 150 R 50 50 1 1 P
X P10 10 250 -50 150 L 50 50 1 1 P
X P11 11 -250 -150 150 R 50 50 1 1 P
X P12 12 250 -150 150 L 50 50 1 1 P
X P13 13 -250 -250 150 R 50 50 1 1 P
X P14 14 250 -250 150 L 50 50 1 1 P
X P15 15 -250 -350 150 R 50 50 1 1 P
X P16 16 250 -350 150 L 50 50 1 1 P
ENDDRAW
ENDDEF
#
# CONN_02X20
#
DEF CONN_02X20 P 0 1 Y N 1 F N
F0 "P" 0 1050 50 H V C CNN
F1 "CONN_02X20" 0 0 50 V V C CNN
F2 "" 0 -950 60 H V C CNN
F3 "" 0 -950 60 H V C CNN
$FPLIST
Pin_Header_Straight_2X20
Pin_Header_Angled_2X20
Socket_Strip_Straight_2X20
Socket_Strip_Angled_2X20
$ENDFPLIST
DRAW
S -100 -945 -50 -955 0 1 0 N
S -100 -845 -50 -855 0 1 0 N
S -100 -745 -50 -755 0 1 0 N
S -100 -645 -50 -655 0 1 0 N
S -100 -545 -50 -555 0 1 0 N
S -100 -445 -50 -455 0 1 0 N
S -100 -345 -50 -355 0 1 0 N
S -100 -245 -50 -255 0 1 0 N
S -100 -145 -50 -155 0 1 0 N
S -100 -45 -50 -55 0 1 0 N
S -100 55 -50 45 0 1 0 N
S -100 155 -50 145 0 1 0 N
S -100 255 -50 245 0 1 0 N
S -100 355 -50 345 0 1 0 N
S -100 455 -50 445 0 1 0 N
S -100 555 -50 545 0 1 0 N
S -100 655 -50 645 0 1 0 N
S -100 755 -50 745 0 1 0 N
S -100 855 -50 845 0 1 0 N
S -100 955 -50 945 0 1 0 N
S -100 1000 100 -1000 0 1 0 N
S 50 -945 100 -955 0 1 0 N
S 50 -845 100 -855 0 1 0 N
S 50 -745 100 -755 0 1 0 N
S 50 -645 100 -655 0 1 0 N
S 50 -545 100 -555 0 1 0 N
S 50 -445 100 -455 0 1 0 N
S 50 -345 100 -355 0 1 0 N
S 50 -245 100 -255 0 1 0 N
S 50 -145 100 -155 0 1 0 N
S 50 -45 100 -55 0 1 0 N
S 50 55 100 45 0 1 0 N
S 50 155 100 145 0 1 0 N
S 50 255 100 245 0 1 0 N
S 50 355 100 345 0 1 0 N
S 50 455 100 445 0 1 0 N
S 50 555 100 545 0 1 0 N
S 50 655 100 645 0 1 0 N
S 50 755 100 745 0 1 0 N
S 50 855 100 845 0 1 0 N
S 50 955 100 945 0 1 0 N
X P1 1 -250 950 150 R 50 50 1 1 P
X P2 2 250 950 150 L 50 50 1 1 P
X P3 3 -250 850 150 R 50 50 1 1 P
X P4 4 250 850 150 L 50 50 1 1 P
X P5 5 -250 750 150 R 50 50 1 1 P
X P6 6 250 750 150 L 50 50 1 1 P
X P7 7 -250 650 150 R 50 50 1 1 P
X P8 8 250 650 150 L 50 50 1 1 P
X P9 9 -250 550 150 R 50 50 1 1 P
X P10 10 250 550 150 L 50 50 1 1 P
X P20 20 250 50 150 L 50 50 1 1 P
X P30 30 250 -450 150 L 50 50 1 1 P
X P40 40 250 -950 150 L 50 50 1 1 P
X P11 11 -250 450 150 R 50 50 1 1 P
X P21 21 -250 -50 150 R 50 50 1 1 P
X P31 31 -250 -550 150 R 50 50 1 1 P
X P12 12 250 450 150 L 50 50 1 1 P
X P22 22 250 -50 150 L 50 50 1 1 P
X P32 32 250 -550 150 L 50 50 1 1 P
X P13 13 -250 350 150 R 50 50 1 1 P
X P23 23 -250 -150 150 R 50 50 1 1 P
X P33 33 -250 -650 150 R 50 50 1 1 P
X P14 14 250 350 150 L 50 50 1 1 P
X P24 24 250 -150 150 L 50 50 1 1 P
X P34 34 250 -650 150 L 50 50 1 1 P
X P15 15 -250 250 150 R 50 50 1 1 P
X P25 25 -250 -250 150 R 50 50 1 1 P
X P35 35 -250 -750 150 R 50 50 1 1 P
X P16 16 250 250 150 L 50 50 1 1 P
X P26 26 250 -250 150 L 50 50 1 1 P
X P36 36 250 -750 150 L 50 50 1 1 P
X P17 17 -250 150 150 R 50 50 1 1 P
X P27 27 -250 -350 150 R 50 50 1 1 P
X P37 37 -250 -850 150 R 50 50 1 1 P
X P18 18 250 150 150 L 50 50 1 1 P
X P28 28 250 -350 150 L 50 50 1 1 P
X P38 38 250 -850 150 L 50 50 1 1 P
X P19 19 -250 50 150 R 50 50 1 1 P
X P29 29 -250 -450 150 R 50 50 1 1 P
X P39 39 -250 -950 150 R 50 50 1 1 P
ENDDRAW
ENDDEF
#
# GND
#
DEF GND #PWR 0 0 Y Y 1 F P
F0 "#PWR" 0 -250 50 H I C CNN
F1 "GND" 0 -150 50 H V C CNN
F2 "" 0 0 60 H V C CNN
F3 "" 0 0 60 H V C CNN
DRAW
P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N
X GND 1 0 0 0 D 50 50 1 1 W N
ENDDRAW
ENDDEF
#
# PWR_FLAG
#
DEF PWR_FLAG #FLG 0 0 N N 1 F P
F0 "#FLG" 0 95 50 H I C CNN
F1 "PWR_FLAG" 0 180 50 H V C CNN
F2 "" 0 0 60 H V C CNN
F3 "" 0 0 60 H V C CNN
DRAW
X pwr 1 0 0 0 U 20 20 0 0 w
P 6 0 1 0 0 0 0 50 -75 100 0 150 75 100 0 50 N
ENDDRAW
ENDDEF
#
# VCC
#
DEF VCC #PWR 0 0 Y Y 1 F P
F0 "#PWR" 0 -150 50 H I C CNN
F1 "VCC" 0 150 50 H V C CNN
F2 "" 0 0 60 H V C CNN
F3 "" 0 0 60 H V C CNN
DRAW
C 0 75 25 0 1 0 N
P 2 0 1 0 0 0 0 50 N
X VCC 1 0 0 0 U 50 50 1 1 W N
ENDDRAW
ENDDEF
#
#End Library

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adapter/active-3/active3-rpi-hub75-adapter.kicad_pcb
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76
adapter/active-3/active3-rpi-hub75-adapter.pro
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@ -1,50 +1,11 @@
update=Sun 01 Mar 2015 09:01:20 PM PST
update=Sat 13 Jun 2015 10:20:45 AM PDT
version=1
last_client=pcbnew
last_client=kicad
[cvpcb]
version=1
NetIExt=net
[cvpcb/libraries]
EquName1=devcms
[eeschema]
version=1
LibDir=
NetFmtName=
RptD_X=0
RptD_Y=100
RptLab=1
LabSize=60
[eeschema/libraries]
LibName1=power
LibName2=device
LibName3=transistors
LibName4=conn
LibName5=linear
LibName6=regul
LibName7=74xx
LibName8=cmos4000
LibName9=adc-dac
LibName10=memory
LibName11=xilinx
LibName12=special
LibName13=microcontrollers
LibName14=dsp
LibName15=microchip
LibName16=analog_switches
LibName17=motorola
LibName18=texas
LibName19=intel
LibName20=audio
LibName21=interface
LibName22=digital-audio
LibName23=philips
LibName24=display
LibName25=cypress
LibName26=siliconi
LibName27=opto
LibName28=atmel
LibName29=contrib
LibName30=valves
[general]
version=1
[pcbnew]
@ -67,3 +28,36 @@ SolderMaskMinWidth=0
DrawSegmentWidth=0.2
BoardOutlineThickness=0.09999999999999999
ModuleOutlineThickness=0.15
[eeschema]
version=1
LibDir=
[eeschema/libraries]
LibName1=power
LibName2=device
LibName3=transistors
LibName4=conn
LibName5=linear
LibName6=regul
LibName7=74xx
LibName8=cmos4000
LibName9=adc-dac
LibName10=memory
LibName11=xilinx
LibName12=microcontrollers
LibName13=dsp
LibName14=microchip
LibName15=analog_switches
LibName16=motorola
LibName17=texas
LibName18=intel
LibName19=audio
LibName20=interface
LibName21=digital-audio
LibName22=philips
LibName23=display
LibName24=cypress
LibName25=siliconi
LibName26=opto
LibName27=atmel
LibName28=contrib
LibName29=valves

202
adapter/active-3/active3-rpi-hub75-adapter.sch
View file

@ -10,7 +10,6 @@ LIBS:cmos4000
LIBS:adc-dac
LIBS:memory
LIBS:xilinx
LIBS:special
LIBS:microcontrollers
LIBS:dsp
LIBS:microchip
@ -50,7 +49,7 @@ U 1 1 54ECAC85
P 5650 1750
F 0 "U1" H 5750 2325 60 0000 L BNN
F 1 "74HC245" H 5700 1175 60 0000 L TNN
F 2 "Housings_SSOP:TSSOP-20_4.4x6.5mm_Pitch0.65mm" H 5650 1750 60 0001 C CNN
F 2 "Housings_SOIC:SOIC-20_7.5x12.8mm_Pitch1.27mm" H 5650 1750 60 0001 C CNN
F 3 "" H 5650 1750 60 0000 C CNN
1 5650 1750
1 0 0 -1
@ -61,7 +60,7 @@ U 1 1 54ECB18C
P 5650 3100
F 0 "U2" H 5750 3675 60 0000 L BNN
F 1 "74HC245" H 5700 2525 60 0000 L TNN
F 2 "Housings_SSOP:TSSOP-20_4.4x6.5mm_Pitch0.65mm" H 5650 3100 60 0001 C CNN
F 2 "Housings_SOIC:SOIC-20_7.5x12.8mm_Pitch1.27mm" H 5650 3100 60 0001 C CNN
F 3 "" H 5650 3100 60 0000 C CNN
1 5650 3100
1 0 0 -1
@ -72,7 +71,7 @@ U 1 1 54ECB1EA
P 5650 4450
F 0 "U3" H 5750 5025 60 0000 L BNN
F 1 "74HC245" H 5700 3875 60 0000 L TNN
F 2 "Housings_SSOP:TSSOP-20_4.4x6.5mm_Pitch0.65mm" H 5650 4450 60 0001 C CNN
F 2 "Housings_SOIC:SOIC-20_7.5x12.8mm_Pitch1.27mm" H 5650 4450 60 0001 C CNN
F 3 "" H 5650 4450 60 0000 C CNN
1 5650 4450
1 0 0 -1
@ -102,7 +101,7 @@ $EndComp
Wire Wire Line
3550 2650 3550 2800
Wire Wire Line
3550 2700 3500 2700
3500 2700 3750 2700
Wire Wire Line
3550 2800 3500 2800
Connection ~ 3550 2700
@ -198,29 +197,29 @@ Text GLabel 3000 4300 0 51 Output ~ 0
p1_g2
Text GLabel 3500 4500 2 51 Output ~ 0
p1_b2
Text GLabel 3500 3900 2 51 Output ~ 0
row_A
Text GLabel 3500 3800 2 51 Output ~ 0
row_B
Text GLabel 3000 3700 0 51 Output ~ 0
row_C
Text GLabel 3000 3600 0 51 Output ~ 0
row_D
Text GLabel 3000 3800 0 51 Output ~ 0
clock
Text GLabel 3000 3200 0 51 Output ~ 0
p0_r1
Text GLabel 3500 3200 2 51 Output ~ 0
p0_g1
Text GLabel 3000 3400 0 51 Output ~ 0
p0_b1
row_A
Text GLabel 3500 3400 2 51 Output ~ 0
p0_r2
row_B
Text GLabel 3500 3500 2 51 Output ~ 0
p0_g2
row_C
Text GLabel 3500 3700 2 51 Output ~ 0
p0_b2
row_D
Text GLabel 3000 3200 0 51 Output ~ 0
clock
Text GLabel 3000 3800 0 51 Output ~ 0
p0_r1
Text GLabel 3000 3300 0 51 Output ~ 0
p0_g1
Text GLabel 3500 3900 2 51 Output ~ 0
p0_b1
Text GLabel 3500 3800 2 51 Output ~ 0
p0_r2
Text GLabel 3000 3700 0 51 Output ~ 0
p0_g2
Text GLabel 3000 3600 0 51 Output ~ 0
p0_b2
Text GLabel 3500 3200 2 51 Output ~ 0
OE
Text GLabel 4950 1950 0 51 Input ~ 0
p0_g1
@ -251,13 +250,13 @@ Wire Wire Line
8750 2900 9300 2900
Wire Wire Line
8750 2300 9300 2300
Text GLabel 4950 2900 0 51 Input ~ 0
row_A
Text GLabel 4950 3000 0 51 Input ~ 0
row_B
Text GLabel 4950 3100 0 51 Input ~ 0
row_C
row_A
Text GLabel 4950 3200 0 51 Input ~ 0
row_B
Text GLabel 4950 3000 0 51 Input ~ 0
row_C
Text GLabel 4950 2900 0 51 Input ~ 0
row_D
Text GLabel 4950 3300 0 51 Input ~ 0
strobe
@ -304,57 +303,57 @@ Wire Wire Line
$Comp
L C C1
U 1 1 54ECBE4F
P 2700 5650
F 0 "C1" H 2700 5750 40 0000 L CNN
F 1 "C" H 2706 5565 40 0000 L CNN
F 2 "Capacitors_SMD:C_0805_HandSoldering" H 2738 5500 30 0001 C CNN
F 3 "" H 2700 5650 60 0000 C CNN
1 2700 5650
P 2700 5600
F 0 "C1" H 2700 5700 40 0000 L CNN
F 1 "100n" H 2706 5515 40 0000 L CNN
F 2 "Capacitors_SMD:C_0805_HandSoldering" H 2738 5450 30 0001 C CNN
F 3 "" H 2700 5600 60 0000 C CNN
1 2700 5600
1 0 0 -1
$EndComp
$Comp
L C C2
U 1 1 54ECBEE4
P 3000 5650
F 0 "C2" H 3000 5750 40 0000 L CNN
F 1 "C" H 3006 5565 40 0000 L CNN
F 2 "Capacitors_SMD:C_0805_HandSoldering" H 3038 5500 30 0001 C CNN
F 3 "" H 3000 5650 60 0000 C CNN
1 3000 5650
P 3000 5600
F 0 "C2" H 3000 5700 40 0000 L CNN
F 1 "100n" H 3006 5515 40 0000 L CNN
F 2 "Capacitors_SMD:C_0805_HandSoldering" H 3038 5450 30 0001 C CNN
F 3 "" H 3000 5600 60 0000 C CNN
1 3000 5600
1 0 0 -1
$EndComp
$Comp
L C C3
U 1 1 54ECBF0A
P 3300 5650
F 0 "C3" H 3300 5750 40 0000 L CNN
F 1 "C" H 3306 5565 40 0000 L CNN
F 2 "Capacitors_SMD:C_0805_HandSoldering" H 3338 5500 30 0001 C CNN
F 3 "" H 3300 5650 60 0000 C CNN
1 3300 5650
P 3300 5600
F 0 "C3" H 3300 5700 40 0000 L CNN
F 1 "100n" H 3306 5515 40 0000 L CNN
F 2 "Capacitors_SMD:C_0805_HandSoldering" H 3338 5450 30 0001 C CNN
F 3 "" H 3300 5600 60 0000 C CNN
1 3300 5600
1 0 0 -1
$EndComp
$Comp
L GND #PWR09
U 1 1 54ECBF56
P 3000 5950
F 0 "#PWR09" H 3000 5950 30 0001 C CNN
F 1 "GND" H 3000 5880 30 0001 C CNN
F 2 "" H 3000 5950 60 0000 C CNN
F 3 "" H 3000 5950 60 0000 C CNN
1 3000 5950
P 3000 5850
F 0 "#PWR09" H 3000 5850 30 0001 C CNN
F 1 "GND" H 3000 5780 30 0001 C CNN
F 2 "" H 3000 5850 60 0000 C CNN
F 3 "" H 3000 5850 60 0000 C CNN
1 3000 5850
1 0 0 -1
$EndComp
Wire Wire Line
3000 5850 3000 5950
3000 5750 3000 5850
Wire Wire Line
3000 5350 3000 5450
Wire Wire Line
2700 5450 3550 5450
Connection ~ 3000 5450
Wire Wire Line
2700 5850 3550 5850
Connection ~ 3000 5850
2700 5750 3550 5750
Connection ~ 3000 5750
$Comp
L VCC #PWR010
U 1 1 54ECD0C1
@ -448,11 +447,11 @@ Text GLabel 6350 1950 2 51 Output ~ 0
p0_g1_buff
Text GLabel 8750 2200 2 51 Input ~ 0
p0_g1_buff
Text GLabel 6350 3200 2 51 Output ~ 0
Text GLabel 6350 2900 2 51 Output ~ 0
row_D_buff
Text GLabel 8750 2700 2 51 Input ~ 0
row_D_buff
Text GLabel 6350 3000 2 51 Output ~ 0
Text GLabel 6350 3200 2 51 Output ~ 0
row_B_buff
Text GLabel 8750 2600 2 51 Input ~ 0
row_B_buff
@ -555,28 +554,28 @@ Text GLabel 3000 2800 0 51 Output ~ 0
p2_g1
Text GLabel 3000 2900 0 51 Output ~ 0
p2_b1
Text GLabel 3500 3100 2 51 Output ~ 0
p2_r2
Text GLabel 3000 4500 0 51 Output ~ 0
p2_r2
Text GLabel 3500 4400 2 51 Output ~ 0
p2_g2
Text GLabel 3500 4600 2 51 Output ~ 0
p2_b2
$Comp
L C C4
U 1 1 54F3B6F5
P 3550 5650
F 0 "C4" H 3550 5750 40 0000 L CNN
F 1 "C" H 3556 5565 40 0000 L CNN
F 2 "Capacitors_SMD:C_0805_HandSoldering" H 3588 5500 30 0001 C CNN
F 3 "" H 3550 5650 60 0000 C CNN
1 3550 5650
P 3550 5600
F 0 "C4" H 3550 5700 40 0000 L CNN
F 1 "100n" H 3556 5515 40 0000 L CNN
F 2 "Capacitors_SMD:C_0805_HandSoldering" H 3588 5450 30 0001 C CNN
F 3 "" H 3550 5600 60 0000 C CNN
1 3550 5600
1 0 0 -1
$EndComp
Connection ~ 3300 5450
Connection ~ 3300 5850
Text GLabel 6350 3100 2 51 Output ~ 0
Connection ~ 3300 5750
Text GLabel 6350 3000 2 51 Output ~ 0
row_C_buff
Text GLabel 6350 2900 2 51 Output ~ 0
Text GLabel 6350 3100 2 51 Output ~ 0
row_A_buff
Text GLabel 6350 3300 2 51 Output ~ 0
strobe_buff_0
@ -658,7 +657,7 @@ U 1 1 54F3F4A2
P 5650 5950
F 0 "U4" H 5750 6525 60 0000 L BNN
F 1 "74HC245" H 5700 5375 60 0000 L TNN
F 2 "Housings_SSOP:TSSOP-20_4.4x6.5mm_Pitch0.65mm" H 5650 5950 60 0001 C CNN
F 2 "Housings_SOIC:SOIC-20_7.5x12.8mm_Pitch1.27mm" H 5650 5950 60 0001 C CNN
F 3 "" H 5650 5950 60 0000 C CNN
1 5650 5950
1 0 0 -1
@ -725,41 +724,38 @@ Text GLabel 6350 2700 2 51 Output ~ 0
strobe_buff_2
Text GLabel 4950 2700 0 51 Input ~ 0
strobe
NoConn ~ 3000 4000
NoConn ~ 3500 4000
NoConn ~ 3500 4100
NoConn ~ 3500 3100
NoConn ~ 3000 3100
NoConn ~ 3000 3500
NoConn ~ 3000 2700
$Comp
L GND #PWR021
U 1 1 54F40772
P 4800 2600
F 0 "#PWR021" H 4800 2600 30 0001 C CNN
F 1 "GND" H 4800 2530 30 0001 C CNN
F 2 "" H 4800 2600 60 0000 C CNN
F 3 "" H 4800 2600 60 0000 C CNN
1 4800 2600
0 1 1 0
L PWR_FLAG #FLG021
U 1 1 557B1FD6
P 3750 2700
F 0 "#FLG021" H 3750 2795 50 0001 C CNN
F 1 "PWR_FLAG" H 3750 2880 50 0000 C CNN
F 2 "" H 3750 2700 60 0000 C CNN
F 3 "" H 3750 2700 60 0000 C CNN
1 3750 2700
1 0 0 -1
$EndComp
$Comp
L PWR_FLAG #FLG022
U 1 1 557B23A7
P 2950 4700
F 0 "#FLG022" H 2950 4795 50 0001 C CNN
F 1 "PWR_FLAG" H 2950 4880 50 0000 C CNN
F 2 "" H 2950 4700 60 0000 C CNN
F 3 "" H 2950 4700 60 0000 C CNN
1 2950 4700
-1 0 0 1
$EndComp
Wire Wire Line
4950 2600 4800 2600
$Comp
L CONN_01X01 P2
U 1 1 54F43868
P 2750 6400
F 0 "P2" H 2750 6500 50 0000 C CNN
F 1 "CONN_01X01" V 2850 6400 50 0000 C CNN
F 2 "Connect:1pin" H 2750 6400 60 0001 C CNN
F 3 "" H 2750 6400 60 0000 C CNN
1 2750 6400
1 0 0 -1
$EndComp
$Comp
L CONN_01X01 P3
U 1 1 54F43A29
P 3150 6400
F 0 "P3" H 3150 6500 50 0000 C CNN
F 1 "CONN_01X01" V 3250 6400 50 0000 C CNN
F 2 "Connect:1pin" H 3150 6400 60 0001 C CNN
F 3 "" H 3150 6400 60 0000 C CNN
1 3150 6400
1 0 0 -1
$EndComp
Text Notes 2650 6750 0 60 ~ 0
Mounting holes\n
2950 4600 2950 4700
Connection ~ 2950 4600
NoConn ~ 6350 2600
NoConn ~ 4950 2600
$EndSCHEMATC

23
adapter/active/README.md
View file

@ -1,23 +0,0 @@
Adapter PCB to support up to 2 panels
======================================
* Supports one panel for Raspberry PIs with 26 GPIO pins and two
panels for newer plus models and Raspberry Pi 2 that have 40 GPIO pins.
* Uses HCT245 to level shift signals from 3.3V to 5V and shield
the Raspberry Pi GPIOs from overloading.
* This supports two panels and provides convenient breakouts
for I²C and the serial interface.
* Open source KiCAD PCB EDA format.
* If you are interested in connecting three RGB panels, check out the
[Active-3](../active-3/) board (it won't support the serial intefaces
though).
For multiple parallel boards to work and using the I2C and serial interface you have to uncomment
#DEFINES+=-DSUPPORT_MULTI_PARALLEL # remove the '#' in the begging
in [lib/Makefile](../../lib/Makefile).
![Preview][rendering]
[rendering]: ../../img/active2-pcb.png

1755
adapter/active/active-rpi-hub75-adapter.kicad_pcb
View file

File diff suppressed because it is too large Load diff

68
adapter/active/active-rpi-hub75-adapter.pro
View file

@ -1,68 +0,0 @@
update=Tue 24 Feb 2015 08:52:48 AM PST
version=1
last_client=kicad
[cvpcb]
version=1
NetIExt=net
[cvpcb/libraries]
EquName1=devcms
[eeschema]
version=1
LibDir=
NetFmtName=
RptD_X=0
RptD_Y=100
RptLab=1
LabSize=60
[eeschema/libraries]
LibName1=power
LibName2=device
LibName3=transistors
LibName4=conn
LibName5=linear
LibName6=regul
LibName7=74xx
LibName8=cmos4000
LibName9=adc-dac
LibName10=memory
LibName11=xilinx
LibName12=special
LibName13=microcontrollers
LibName14=dsp
LibName15=microchip
LibName16=analog_switches
LibName17=motorola
LibName18=texas
LibName19=intel
LibName20=audio
LibName21=interface
LibName22=digital-audio
LibName23=philips
LibName24=display
LibName25=cypress
LibName26=siliconi
LibName27=opto
LibName28=atmel
LibName29=contrib
LibName30=valves
[pcbnew]
version=1
LastNetListRead=
UseCmpFile=1
PadDrill=0.600000000000
PadDrillOvalY=0.600000000000
PadSizeH=1.500000000000
PadSizeV=1.500000000000
PcbTextSizeV=1.500000000000
PcbTextSizeH=1.500000000000
PcbTextThickness=0.300000000000
ModuleTextSizeV=1.000000000000
ModuleTextSizeH=1.000000000000
ModuleTextSizeThickness=0.150000000000
SolderMaskClearance=0.000000000000
SolderMaskMinWidth=0.000000000000
DrawSegmentWidth=0.200000000000
BoardOutlineThickness=0.100000000000
ModuleOutlineThickness=0.150000000000
[general]
version=1

612
adapter/active/active-rpi-hub75-adapter.sch
View file

@ -1,612 +0,0 @@
EESchema Schematic File Version 2
LIBS:power
LIBS:device
LIBS:transistors
LIBS:conn
LIBS:linear
LIBS:regul
LIBS:74xx
LIBS:cmos4000
LIBS:adc-dac
LIBS:memory
LIBS:xilinx
LIBS:special
LIBS:microcontrollers
LIBS:dsp
LIBS:microchip
LIBS:analog_switches
LIBS:motorola
LIBS:texas
LIBS:intel
LIBS:audio
LIBS:interface
LIBS:digital-audio
LIBS:philips
LIBS:display
LIBS:cypress
LIBS:siliconi
LIBS:opto
LIBS:atmel
LIBS:contrib
LIBS:valves
LIBS:rpi-hub75-adapter-cache
EELAYER 25 0
EELAYER END
$Descr A4 11693 8268
encoding utf-8
Sheet 1 1
Title ""
Date ""
Rev ""
Comp ""
Comment1 ""
Comment2 ""
Comment3 ""
Comment4 ""
$EndDescr
$Comp
L 74HC245 U1
U 1 1 54ECAC85
P 6250 2700
F 0 "U1" H 6350 3275 60 0000 L BNN
F 1 "74HC245" H 6300 2125 60 0000 L TNN
F 2 "Housings_SSOP:TSSOP-20_4.4x6.5mm_Pitch0.65mm" H 6250 2700 60 0001 C CNN
F 3 "" H 6250 2700 60 0000 C CNN
1 6250 2700
1 0 0 -1
$EndComp
$Comp
L 74HC245 U2
U 1 1 54ECB18C
P 6250 4050
F 0 "U2" H 6350 4625 60 0000 L BNN
F 1 "74HC245" H 6300 3475 60 0000 L TNN
F 2 "Housings_SSOP:TSSOP-20_4.4x6.5mm_Pitch0.65mm" H 6250 4050 60 0001 C CNN
F 3 "" H 6250 4050 60 0000 C CNN
1 6250 4050
1 0 0 -1
$EndComp
$Comp
L 74HC245 U3
U 1 1 54ECB1EA
P 6250 5400
F 0 "U3" H 6350 5975 60 0000 L BNN
F 1 "74HC245" H 6300 4825 60 0000 L TNN
F 2 "Housings_SSOP:TSSOP-20_4.4x6.5mm_Pitch0.65mm" H 6250 5400 60 0001 C CNN
F 3 "" H 6250 5400 60 0000 C CNN
1 6250 5400
1 0 0 -1
$EndComp
$Comp
L CONN_02X08 Panel-1
U 1 1 54ECB236
P 8500 2550
F 0 "Panel-1" H 8500 3000 50 0000 C CNN
F 1 "CONN_02X08" V 8500 2550 50 0000 C CNN
F 2 "Pin_Headers:Pin_Header_Straight_2x08" H 8500 1350 60 0001 C CNN
F 3 "" H 8500 1350 60 0000 C CNN
1 8500 2550
1 0 0 -1
$EndComp
$Comp
L CONN_02X20 P1
U 1 1 54ECB2B7
P 3250 3650
F 0 "P1" H 3250 4700 50 0000 C CNN
F 1 "CONN_02X20" V 3250 3650 50 0000 C CNN
F 2 "Pin_Headers:Pin_Header_Straight_2x20" H 3250 2700 60 0001 C CNN
F 3 "" H 3250 2700 60 0000 C CNN
1 3250 3650
1 0 0 -1
$EndComp
Wire Wire Line
3550 2650 3550 2800
Wire Wire Line
3550 2700 3500 2700
Wire Wire Line
3550 2800 3500 2800
Connection ~ 3550 2700
$Comp
L GND #PWR01
U 1 1 54ECB3E1
P 3600 3300
F 0 "#PWR01" H 3600 3300 30 0001 C CNN
F 1 "GND" H 3600 3230 30 0001 C CNN
F 2 "" H 3600 3300 60 0000 C CNN
F 3 "" H 3600 3300 60 0000 C CNN
1 3600 3300
0 -1 -1 0
$EndComp
Wire Wire Line
3500 3300 3600 3300
$Comp
L GND #PWR02
U 1 1 54ECB417
P 3600 3600
F 0 "#PWR02" H 3600 3600 30 0001 C CNN
F 1 "GND" H 3600 3530 30 0001 C CNN
F 2 "" H 3600 3600 60 0000 C CNN
F 3 "" H 3600 3600 60 0000 C CNN
1 3600 3600
0 -1 -1 0
$EndComp
Wire Wire Line
3500 3600 3600 3600
$Comp
L GND #PWR03
U 1 1 54ECB4A1
P 3600 2900
F 0 "#PWR03" H 3600 2900 30 0001 C CNN
F 1 "GND" H 3600 2830 30 0001 C CNN
F 2 "" H 3600 2900 60 0000 C CNN
F 3 "" H 3600 2900 60 0000 C CNN
1 3600 2900
0 -1 -1 0
$EndComp
Wire Wire Line
3500 2900 3600 2900
$Comp
L GND #PWR04
U 1 1 54ECB5FE
P 2900 4600
F 0 "#PWR04" H 2900 4600 30 0001 C CNN
F 1 "GND" H 2900 4530 30 0001 C CNN
F 2 "" H 2900 4600 60 0000 C CNN
F 3 "" H 2900 4600 60 0000 C CNN
1 2900 4600
0 1 1 0
$EndComp
Wire Wire Line
2900 4600 3000 4600
$Comp
L GND #PWR05
U 1 1 54ECB73E
P 3600 4300
F 0 "#PWR05" H 3600 4300 30 0001 C CNN
F 1 "GND" H 3600 4230 30 0001 C CNN
F 2 "" H 3600 4300 60 0000 C CNN
F 3 "" H 3600 4300 60 0000 C CNN
1 3600 4300
0 -1 -1 0
$EndComp
Wire Wire Line
3500 4300 3600 4300
$Comp
L GND #PWR06
U 1 1 54ECB7BC
P 2900 3900
F 0 "#PWR06" H 2900 3900 30 0001 C CNN
F 1 "GND" H 2900 3830 30 0001 C CNN
F 2 "" H 2900 3900 60 0000 C CNN
F 3 "" H 2900 3900 60 0000 C CNN
1 2900 3900
0 1 1 0
$EndComp
Wire Wire Line
2900 3900 3000 3900
Text GLabel 3000 3000 0 51 Output ~ 0
strobe
Text GLabel 3500 4200 2 51 Output ~ 0
p1_r1
Text GLabel 3000 4100 0 51 Output ~ 0
p1_g1
Text GLabel 3000 4200 0 51 Output ~ 0
p1_b1
Text GLabel 3000 4400 0 51 Output ~ 0
p1_r2
Text GLabel 3000 4300 0 51 Output ~ 0
p1_g2
Text GLabel 3500 4500 2 51 Output ~ 0
p1_b2
Text GLabel 3500 3900 2 51 Output ~ 0
row_A
Text GLabel 3500 3800 2 51 Output ~ 0
row_B
Text GLabel 3000 3700 0 51 Output ~ 0
row_C
Text GLabel 3000 3600 0 51 Output ~ 0
row_D
Text GLabel 3000 3800 0 51 Output ~ 0
clock
Text GLabel 3000 3200 0 51 Output ~ 0
p0_r1
Text GLabel 3500 3200 2 51 Output ~ 0
p0_g1
Text GLabel 3000 3400 0 51 Output ~ 0
p0_b1
Text GLabel 3500 3400 2 51 Output ~ 0
p0_r2
Text GLabel 3500 3500 2 51 Output ~ 0
p0_g2
Text GLabel 3500 3700 2 51 Output ~ 0
p0_b2
Text GLabel 3000 3300 0 51 Output ~ 0
OE
Text GLabel 5550 2900 0 51 Input ~ 0
p0_g1
Text GLabel 5550 2800 0 51 Input ~ 0
p0_r1
Text GLabel 5550 2700 0 51 Input ~ 0
p0_b1
Text GLabel 5550 2500 0 51 Input ~ 0
p0_r2
Text GLabel 5550 2400 0 51 Input ~ 0
p0_b2
Text GLabel 5550 2600 0 51 Input ~ 0
p0_g2
Wire Wire Line
8750 2500 9300 2500
$Comp
L GND #PWR07
U 1 1 54ECD031
P 9300 2950
F 0 "#PWR07" H 9300 2950 30 0001 C CNN
F 1 "GND" H 9300 2880 30 0001 C CNN
F 2 "" H 9300 2950 60 0000 C CNN
F 3 "" H 9300 2950 60 0000 C CNN
1 9300 2950
1 0 0 -1
$EndComp
Wire Wire Line
8750 2900 9300 2900
Wire Wire Line
8750 2300 9300 2300
Text GLabel 5550 3850 0 51 Input ~ 0
row_A
Text GLabel 5550 3950 0 51 Input ~ 0
row_B
Text GLabel 5550 4050 0 51 Input ~ 0
row_C
Text GLabel 5550 4150 0 51 Input ~ 0
row_D
Text GLabel 5550 4250 0 51 Input ~ 0
strobe
Text GLabel 5550 2200 0 51 Input ~ 0
OE
$Comp
L CONN_02X08 Panel-2
U 1 1 54ECE201
P 8500 5100
F 0 "Panel-2" H 8500 5550 50 0000 C CNN
F 1 "CONN_02X08" V 8500 5100 50 0000 C CNN
F 2 "Pin_Headers:Pin_Header_Straight_2x08" H 8500 3900 60 0001 C CNN
F 3 "" H 8500 3900 60 0000 C CNN
1 8500 5100
1 0 0 -1
$EndComp
Text GLabel 5550 5600 0 51 Input ~ 0
p1_g1
Text GLabel 5550 5500 0 51 Input ~ 0
p1_r1
Text GLabel 5550 5400 0 51 Input ~ 0
p1_b1
Text GLabel 5550 5100 0 51 Input ~ 0
p1_b2
Text GLabel 5550 5300 0 51 Input ~ 0
p1_g2
Wire Wire Line
8750 5050 9300 5050
$Comp
L GND #PWR08
U 1 1 54ECE20E
P 9300 5500
F 0 "#PWR08" H 9300 5500 30 0001 C CNN
F 1 "GND" H 9300 5430 30 0001 C CNN
F 2 "" H 9300 5500 60 0000 C CNN
F 3 "" H 9300 5500 60 0000 C CNN
1 9300 5500
1 0 0 -1
$EndComp
Wire Wire Line
8750 5450 9300 5450
Wire Wire Line
8750 4850 9300 4850
$Comp
L C C1
U 1 1 54ECBE4F
P 4400 6550
F 0 "C1" H 4400 6650 40 0000 L CNN
F 1 "C" H 4406 6465 40 0000 L CNN
F 2 "Capacitors_SMD:C_0805_HandSoldering" H 4438 6400 30 0001 C CNN
F 3 "" H 4400 6550 60 0000 C CNN
1 4400 6550
1 0 0 -1
$EndComp
$Comp
L C C2
U 1 1 54ECBEE4
P 4700 6550
F 0 "C2" H 4700 6650 40 0000 L CNN
F 1 "C" H 4706 6465 40 0000 L CNN
F 2 "Capacitors_SMD:C_0805_HandSoldering" H 4738 6400 30 0001 C CNN
F 3 "" H 4700 6550 60 0000 C CNN
1 4700 6550
1 0 0 -1
$EndComp
$Comp
L C C3
U 1 1 54ECBF0A
P 5000 6550
F 0 "C3" H 5000 6650 40 0000 L CNN
F 1 "C" H 5006 6465 40 0000 L CNN
F 2 "Capacitors_SMD:C_0805_HandSoldering" H 5038 6400 30 0001 C CNN
F 3 "" H 5000 6550 60 0000 C CNN
1 5000 6550
1 0 0 -1
$EndComp
$Comp
L GND #PWR09
U 1 1 54ECBF56
P 4700 6850
F 0 "#PWR09" H 4700 6850 30 0001 C CNN
F 1 "GND" H 4700 6780 30 0001 C CNN
F 2 "" H 4700 6850 60 0000 C CNN
F 3 "" H 4700 6850 60 0000 C CNN
1 4700 6850
1 0 0 -1
$EndComp
Wire Wire Line
4700 6750 4700 6850
Wire Wire Line
4700 6250 4700 6350
Wire Wire Line
4400 6350 5000 6350
Connection ~ 4700 6350
Wire Wire Line
4400 6750 5000 6750
Connection ~ 4700 6750
$Comp
L VCC #PWR010
U 1 1 54ECD0C1
P 4700 6250
F 0 "#PWR010" H 4700 6350 30 0001 C CNN
F 1 "VCC" H 4700 6350 30 0000 C CNN
F 2 "" H 4700 6250 60 0000 C CNN
F 3 "" H 4700 6250 60 0000 C CNN
1 4700 6250
1 0 0 -1
$EndComp
$Comp
L VCC #PWR011
U 1 1 54ECD3DE
P 3550 2650
F 0 "#PWR011" H 3550 2750 30 0001 C CNN
F 1 "VCC" H 3550 2750 30 0000 C CNN
F 2 "" H 3550 2650 60 0000 C CNN
F 3 "" H 3550 2650 60 0000 C CNN
1 3550 2650
1 0 0 -1
$EndComp
$Comp
L CONN_01X02 P2
U 1 1 54ECE3B2
P 2650 2850
F 0 "P2" H 2650 3000 50 0000 C CNN
F 1 "CONN_01X02" V 2750 2850 50 0000 C CNN
F 2 "Pin_Headers:Pin_Header_Straight_1x02" H 2650 2850 60 0001 C CNN
F 3 "" H 2650 2850 60 0000 C CNN
1 2650 2850
-1 0 0 1
$EndComp
Wire Wire Line
2850 2800 3000 2800
Wire Wire Line
2850 2900 3000 2900
$Comp
L CONN_01X02 P3
U 1 1 54ECE47C
P 3850 3050
F 0 "P3" H 3850 3200 50 0000 C CNN
F 1 "CONN_01X02" V 3950 3050 50 0000 C CNN
F 2 "Pin_Headers:Pin_Header_Straight_1x02" H 3850 3050 60 0001 C CNN
F 3 "" H 3850 3050 60 0000 C CNN
1 3850 3050
1 0 0 -1
$EndComp
Wire Wire Line
3500 3000 3650 3000
Wire Wire Line
3500 3100 3650 3100
$Comp
L GND #PWR012
U 1 1 54ECF31C
P 5550 3250
F 0 "#PWR012" H 5550 3250 30 0001 C CNN
F 1 "GND" H 5550 3180 30 0001 C CNN
F 2 "" H 5550 3250 60 0000 C CNN
F 3 "" H 5550 3250 60 0000 C CNN
1 5550 3250
1 0 0 -1
$EndComp
Wire Wire Line
5550 3200 5550 3250
$Comp
L GND #PWR013
U 1 1 54ECF3AB
P 5550 4600
F 0 "#PWR013" H 5550 4600 30 0001 C CNN
F 1 "GND" H 5550 4530 30 0001 C CNN
F 2 "" H 5550 4600 60 0000 C CNN
F 3 "" H 5550 4600 60 0000 C CNN
1 5550 4600
1 0 0 -1
$EndComp
$Comp
L GND #PWR014
U 1 1 54ECF608
P 5550 5950
F 0 "#PWR014" H 5550 5950 30 0001 C CNN
F 1 "GND" H 5550 5880 30 0001 C CNN
F 2 "" H 5550 5950 60 0000 C CNN
F 3 "" H 5550 5950 60 0000 C CNN
1 5550 5950
1 0 0 -1
$EndComp
Wire Wire Line
5550 4550 5550 4600
Wire Wire Line
5550 5900 5550 5950
Text GLabel 5550 4900 0 51 Input ~ 0
OE
Text GLabel 5550 5000 0 51 Input ~ 0
clock
Text GLabel 5550 2300 0 51 Input ~ 0
clock
Text GLabel 6950 5300 2 51 Output ~ 0
p1_g2_buf
Text GLabel 8750 4950 2 51 Input ~ 0
p1_g2_buf
Wire Wire Line
9300 4850 9300 5500
Connection ~ 9300 5450
Connection ~ 9300 5050
Text GLabel 5550 5200 0 51 Input ~ 0
p1_r2
Text GLabel 6950 5100 2 51 Output ~ 0
p1_b2_buff
Text GLabel 8750 4750 2 51 Input ~ 0
p1_g1_buff
Wire Wire Line
9300 2300 9300 2950
Connection ~ 9300 2500
Connection ~ 9300 2900
Text GLabel 6950 2600 2 51 Output ~ 0
p0_g2_buff
Text GLabel 8750 2400 2 51 Input ~ 0
p0_g2_buff
Text GLabel 6950 2900 2 51 Output ~ 0
p0_g1_buff
Text GLabel 8750 2200 2 51 Input ~ 0
p0_g1_buff
Text GLabel 6950 4150 2 51 Output ~ 0
row_D_buff
Text GLabel 8750 2700 2 51 Input ~ 0
row_D_buff
Text GLabel 6950 3950 2 51 Output ~ 0
row_B_buff
Text GLabel 8750 2600 2 51 Input ~ 0
row_B_buff
Wire Wire Line
6950 3850 7900 3850
Wire Wire Line
7900 2600 7900 5150
Wire Wire Line
7900 2600 8250 2600
Wire Wire Line
6950 4050 8050 4050
Wire Wire Line
8050 2700 8050 5250
Wire Wire Line
8050 2700 8250 2700
Text GLabel 8750 5150 2 51 Input ~ 0
row_B_buff
Text GLabel 8750 5250 2 51 Input ~ 0
row_D_buff
Wire Wire Line
8050 5250 8250 5250
Connection ~ 8050 4050
Wire Wire Line
7900 5150 8250 5150
Connection ~ 7900 3850
Text GLabel 5550 3750 0 51 Input ~ 0
strobe
Wire Wire Line
6950 4250 9000 4250
Wire Wire Line
9000 4250 9000 2800
Wire Wire Line
9000 2800 8750 2800
Wire Wire Line
6950 3750 9450 3750
Wire Wire Line
9450 3750 9450 5350
Wire Wire Line
9450 5350 8750 5350
$Comp
L VCC #PWR015
U 1 1 54ED6227
P 5300 3100
F 0 "#PWR015" H 5300 3200 30 0001 C CNN
F 1 "VCC" H 5300 3200 30 0000 C CNN
F 2 "" H 5300 3100 60 0000 C CNN
F 3 "" H 5300 3100 60 0000 C CNN
1 5300 3100
1 0 0 -1
$EndComp
Wire Wire Line
5550 3100 5300 3100
$Comp
L VCC #PWR016
U 1 1 54ED629A
P 5300 4450
F 0 "#PWR016" H 5300 4550 30 0001 C CNN
F 1 "VCC" H 5300 4550 30 0000 C CNN
F 2 "" H 5300 4450 60 0000 C CNN
F 3 "" H 5300 4450 60 0000 C CNN
1 5300 4450
1 0 0 -1
$EndComp
Wire Wire Line
5300 4450 5550 4450
$Comp
L VCC #PWR017
U 1 1 54ED670D
P 5350 5800
F 0 "#PWR017" H 5350 5900 30 0001 C CNN
F 1 "VCC" H 5350 5900 30 0000 C CNN
F 2 "" H 5350 5800 60 0000 C CNN
F 3 "" H 5350 5800 60 0000 C CNN
1 5350 5800
1 0 0 -1
$EndComp
Wire Wire Line
5350 5800 5550 5800
Text GLabel 8250 2200 0 51 Input ~ 0
p0_r1_buff
Text GLabel 8250 2800 0 51 Input ~ 0
clock_buff_0
Text GLabel 6950 2800 2 51 Output ~ 0
p0_r1_buff
Text GLabel 8250 2500 0 51 Input ~ 0
p0_b2_buff
Text GLabel 8250 2300 0 51 Input ~ 0
p0_b1_buff
Text GLabel 8250 2400 0 51 Input ~ 0
p0_r2_buff
Text GLabel 8250 2900 0 51 Input ~ 0
OE_buff_0
Text GLabel 6950 2700 2 51 Output ~ 0
p0_b1_buff
Text GLabel 6950 2400 2 51 Output ~ 0
p0_b2_buff
Text GLabel 6950 2500 2 51 Output ~ 0
p0_r2_buff
Text GLabel 6950 2300 2 51 Output ~ 0
clock_buff_0
Text GLabel 6950 2200 2 51 Output ~ 0
OE_buff_0
Text GLabel 8250 4750 0 51 Input ~ 0
p1_r1_buff
Text GLabel 8250 4850 0 51 Input ~ 0
p1_b1_buff
Text GLabel 8250 4950 0 51 Input ~ 0
p1_r2_buff
Text GLabel 8250 5050 0 51 Input ~ 0
p1_b2_buff
Text GLabel 8250 5350 0 51 Input ~ 0
clock_buff_1
Text GLabel 8250 5450 0 51 Input ~ 0
OE_buff_1
Text GLabel 6950 4900 2 51 Output ~ 0
OE_buff_1
Text GLabel 6950 5000 2 51 Output ~ 0
clock_buff_1
Text GLabel 6950 5200 2 51 Output ~ 0
p1_r2_buff
Text GLabel 6950 5400 2 51 Output ~ 0
p1_b1_buff
Text GLabel 6950 5500 2 51 Output ~ 0
p1_r1_buff
Text GLabel 6950 5600 2 51 Output ~ 0
p1_g1_buff
$EndSCHEMATC

16
adapter/passive-3/README.md Normal file
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@ -0,0 +1,16 @@
Adapter PCB to support up to 3 panels
======================================
* Passive board. Simple, but might need to define `RGB_SLOWDOWN_GPIO` if you see
glitches. Consider using the [active board](../active-3) in that case.
* Supports up to three panel chains for newer plus models and
Raspberry Pi 2 that have 40 GPIO pins.
* Open source KiCAD PCB EDA format.
* (not very pretty layout, was just lazy and let the auto-router do it).
You can [buy the board from OSH Park][osh-passive3].
![Preview][rendering]
[rendering]: ../../img/passive3-pcb.png
[osh-passive3]: https://oshpark.com/shared_projects/FNAtZUsP

218
adapter/passive-3/passive3-rpi-hub75-adapter-cache.lib Normal file
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@ -0,0 +1,218 @@
EESchema-LIBRARY Version 2.3
#encoding utf-8
#
<<<<<<< HEAD
# CONN_01X01
#
DEF CONN_01X01 P 0 40 Y N 1 F N
F0 "P" 0 100 50 H V C CNN
F1 "CONN_01X01" 100 0 50 V V C CNN
F2 "" 0 0 60 H V C CNN
F3 "" 0 0 60 H V C CNN
$FPLIST
Pin_Header_Straight_1X01
Pin_Header_Angled_1X01
Socket_Strip_Straight_1X01
Socket_Strip_Angled_1X01
$ENDFPLIST
DRAW
S -50 5 10 -5 0 1 0 N
S -50 50 50 -50 0 1 0 N
X P1 1 -200 0 150 R 50 50 1 1 P
ENDDRAW
ENDDEF
#
=======
>>>>>>> d9ecea532afc911de3244f458589b6eadd051949
# CONN_02X08
#
DEF CONN_02X08 P 0 1 Y N 1 F N
F0 "P" 0 450 50 H V C CNN
F1 "CONN_02X08" 0 0 50 V V C CNN
F2 "" 0 -1200 60 H V C CNN
F3 "" 0 -1200 60 H V C CNN
$FPLIST
Pin_Header_Straight_2X08
Pin_Header_Angled_2X08
Socket_Strip_Straight_2X08
Socket_Strip_Angled_2X08
$ENDFPLIST
DRAW
S -100 -345 -50 -355 0 1 0 N
S -100 -245 -50 -255 0 1 0 N
S -100 -145 -50 -155 0 1 0 N
S -100 -45 -50 -55 0 1 0 N
S -100 55 -50 45 0 1 0 N
S -100 155 -50 145 0 1 0 N
S -100 255 -50 245 0 1 0 N
S -100 355 -50 345 0 1 0 N
S -100 400 100 -400 0 1 0 N
S 50 -345 100 -355 0 1 0 N
S 50 -245 100 -255 0 1 0 N
S 50 -145 100 -155 0 1 0 N
S 50 -45 100 -55 0 1 0 N
S 50 55 100 45 0 1 0 N
S 50 155 100 145 0 1 0 N
S 50 255 100 245 0 1 0 N
S 50 355 100 345 0 1 0 N
X P1 1 -250 350 150 R 50 50 1 1 P
X P2 2 250 350 150 L 50 50 1 1 P
X P3 3 -250 250 150 R 50 50 1 1 P
X P4 4 250 250 150 L 50 50 1 1 P
X P5 5 -250 150 150 R 50 50 1 1 P
X P6 6 250 150 150 L 50 50 1 1 P
X P7 7 -250 50 150 R 50 50 1 1 P
X P8 8 250 50 150 L 50 50 1 1 P
X P9 9 -250 -50 150 R 50 50 1 1 P
X P10 10 250 -50 150 L 50 50 1 1 P
X P11 11 -250 -150 150 R 50 50 1 1 P
X P12 12 250 -150 150 L 50 50 1 1 P
X P13 13 -250 -250 150 R 50 50 1 1 P
X P14 14 250 -250 150 L 50 50 1 1 P
X P15 15 -250 -350 150 R 50 50 1 1 P
X P16 16 250 -350 150 L 50 50 1 1 P
ENDDRAW
ENDDEF
#
# CONN_02X20
#
DEF CONN_02X20 P 0 1 Y N 1 F N
F0 "P" 0 1050 50 H V C CNN
F1 "CONN_02X20" 0 0 50 V V C CNN
F2 "" 0 -950 60 H V C CNN
F3 "" 0 -950 60 H V C CNN
$FPLIST
Pin_Header_Straight_2X20
Pin_Header_Angled_2X20
Socket_Strip_Straight_2X20
Socket_Strip_Angled_2X20
$ENDFPLIST
DRAW
S -100 -945 -50 -955 0 1 0 N
S -100 -845 -50 -855 0 1 0 N
S -100 -745 -50 -755 0 1 0 N
S -100 -645 -50 -655 0 1 0 N
S -100 -545 -50 -555 0 1 0 N
S -100 -445 -50 -455 0 1 0 N
S -100 -345 -50 -355 0 1 0 N
S -100 -245 -50 -255 0 1 0 N
S -100 -145 -50 -155 0 1 0 N
S -100 -45 -50 -55 0 1 0 N
S -100 55 -50 45 0 1 0 N
S -100 155 -50 145 0 1 0 N
S -100 255 -50 245 0 1 0 N
S -100 355 -50 345 0 1 0 N
S -100 455 -50 445 0 1 0 N
S -100 555 -50 545 0 1 0 N
S -100 655 -50 645 0 1 0 N
S -100 755 -50 745 0 1 0 N
S -100 855 -50 845 0 1 0 N
S -100 955 -50 945 0 1 0 N
S -100 1000 100 -1000 0 1 0 N
S 50 -945 100 -955 0 1 0 N
S 50 -845 100 -855 0 1 0 N
S 50 -745 100 -755 0 1 0 N
S 50 -645 100 -655 0 1 0 N
S 50 -545 100 -555 0 1 0 N
S 50 -445 100 -455 0 1 0 N
S 50 -345 100 -355 0 1 0 N
S 50 -245 100 -255 0 1 0 N
S 50 -145 100 -155 0 1 0 N
S 50 -45 100 -55 0 1 0 N
S 50 55 100 45 0 1 0 N
S 50 155 100 145 0 1 0 N
S 50 255 100 245 0 1 0 N
S 50 355 100 345 0 1 0 N
S 50 455 100 445 0 1 0 N
S 50 555 100 545 0 1 0 N
S 50 655 100 645 0 1 0 N
S 50 755 100 745 0 1 0 N
S 50 855 100 845 0 1 0 N
S 50 955 100 945 0 1 0 N
X P1 1 -250 950 150 R 50 50 1 1 P
X P2 2 250 950 150 L 50 50 1 1 P
X P3 3 -250 850 150 R 50 50 1 1 P
X P4 4 250 850 150 L 50 50 1 1 P
X P5 5 -250 750 150 R 50 50 1 1 P
X P6 6 250 750 150 L 50 50 1 1 P
X P7 7 -250 650 150 R 50 50 1 1 P
X P8 8 250 650 150 L 50 50 1 1 P
X P9 9 -250 550 150 R 50 50 1 1 P
X P10 10 250 550 150 L 50 50 1 1 P
X P20 20 250 50 150 L 50 50 1 1 P
X P30 30 250 -450 150 L 50 50 1 1 P
X P40 40 250 -950 150 L 50 50 1 1 P
X P11 11 -250 450 150 R 50 50 1 1 P
X P21 21 -250 -50 150 R 50 50 1 1 P
X P31 31 -250 -550 150 R 50 50 1 1 P
X P12 12 250 450 150 L 50 50 1 1 P
X P22 22 250 -50 150 L 50 50 1 1 P
X P32 32 250 -550 150 L 50 50 1 1 P
X P13 13 -250 350 150 R 50 50 1 1 P
X P23 23 -250 -150 150 R 50 50 1 1 P
X P33 33 -250 -650 150 R 50 50 1 1 P
X P14 14 250 350 150 L 50 50 1 1 P
X P24 24 250 -150 150 L 50 50 1 1 P
X P34 34 250 -650 150 L 50 50 1 1 P
X P15 15 -250 250 150 R 50 50 1 1 P
X P25 25 -250 -250 150 R 50 50 1 1 P
X P35 35 -250 -750 150 R 50 50 1 1 P
X P16 16 250 250 150 L 50 50 1 1 P
X P26 26 250 -250 150 L 50 50 1 1 P
X P36 36 250 -750 150 L 50 50 1 1 P
X P17 17 -250 150 150 R 50 50 1 1 P
X P27 27 -250 -350 150 R 50 50 1 1 P
X P37 37 -250 -850 150 R 50 50 1 1 P
X P18 18 250 150 150 L 50 50 1 1 P
X P28 28 250 -350 150 L 50 50 1 1 P
X P38 38 250 -850 150 L 50 50 1 1 P
X P19 19 -250 50 150 R 50 50 1 1 P
X P29 29 -250 -450 150 R 50 50 1 1 P
X P39 39 -250 -950 150 R 50 50 1 1 P
ENDDRAW
ENDDEF
#
# GND
#
DEF GND #PWR 0 0 Y Y 1 F P
F0 "#PWR" 0 -250 50 H I C CNN
F1 "GND" 0 -150 50 H V C CNN
F2 "" 0 0 60 H V C CNN
F3 "" 0 0 60 H V C CNN
DRAW
P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N
X GND 1 0 0 0 D 50 50 1 1 W N
ENDDRAW
ENDDEF
#
<<<<<<< HEAD
=======
# PWR_FLAG
#
DEF PWR_FLAG #FLG 0 0 N N 1 F P
F0 "#FLG" 0 95 50 H I C CNN
F1 "PWR_FLAG" 0 180 50 H V C CNN
F2 "" 0 0 60 H V C CNN
F3 "" 0 0 60 H V C CNN
DRAW
X pwr 1 0 0 0 U 20 20 0 0 w
P 6 0 1 0 0 0 0 50 -75 100 0 150 75 100 0 50 N
ENDDRAW
ENDDEF
#
>>>>>>> d9ecea532afc911de3244f458589b6eadd051949
# VCC
#
DEF VCC #PWR 0 0 Y Y 1 F P
F0 "#PWR" 0 -150 50 H I C CNN
F1 "VCC" 0 150 50 H V C CNN
F2 "" 0 0 60 H V C CNN
F3 "" 0 0 60 H V C CNN
DRAW
C 0 75 25 0 1 0 N
P 2 0 1 0 0 0 0 50 N
X VCC 1 0 0 0 U 50 50 1 1 W N
ENDDRAW
ENDDEF
#
#End Library

1310
adapter/passive-3/passive3-rpi-hub75-adapter.kicad_pcb Normal file
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File diff suppressed because it is too large Load diff

63
adapter/passive-3/passive3-rpi-hub75-adapter.pro Normal file
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@ -0,0 +1,63 @@
update=Wed 17 Jun 2015 07:02:16 PM PDT
version=1
last_client=kicad
[cvpcb]
version=1
NetIExt=net
[cvpcb/libraries]
EquName1=devcms
[general]
version=1
[pcbnew]
version=1
PageLayoutDescrFile=
LastNetListRead=passive3-rpi-hub75-adapter.net
UseCmpFile=0
PadDrill=3.048
PadDrillOvalY=3.048
PadSizeH=4.064
PadSizeV=4.064
PcbTextSizeV=1.5
PcbTextSizeH=1.5
PcbTextThickness=0.3
ModuleTextSizeV=1
ModuleTextSizeH=1
ModuleTextSizeThickness=0.15
SolderMaskClearance=0
SolderMaskMinWidth=0
DrawSegmentWidth=0.2
BoardOutlineThickness=0.09999999999999999
ModuleOutlineThickness=0.15
[eeschema]
version=1
LibDir=
[eeschema/libraries]
LibName1=power
LibName2=device
LibName3=transistors
LibName4=conn
LibName5=linear
LibName6=regul
LibName7=74xx
LibName8=cmos4000
LibName9=adc-dac
LibName10=memory
LibName11=xilinx
LibName12=microcontrollers
LibName13=dsp
LibName14=microchip
LibName15=analog_switches
LibName16=motorola
LibName17=texas
LibName18=intel
LibName19=audio
LibName20=interface
LibName21=digital-audio
LibName22=philips
LibName23=display
LibName24=cypress
LibName25=siliconi
LibName26=opto
LibName27=atmel
LibName28=contrib
LibName29=valves

408
adapter/passive-3/passive3-rpi-hub75-adapter.sch Normal file
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@ -0,0 +1,408 @@
EESchema Schematic File Version 2
LIBS:power
LIBS:device
LIBS:transistors
LIBS:conn
LIBS:linear
LIBS:regul
LIBS:74xx
LIBS:cmos4000
LIBS:adc-dac
LIBS:memory
LIBS:xilinx
LIBS:microcontrollers
LIBS:dsp
LIBS:microchip
LIBS:analog_switches
LIBS:motorola
LIBS:texas
LIBS:intel
LIBS:audio
LIBS:interface
LIBS:digital-audio
LIBS:philips
LIBS:display
LIBS:cypress
LIBS:siliconi
LIBS:opto
LIBS:atmel
LIBS:contrib
LIBS:valves
EELAYER 25 0
EELAYER END
$Descr A4 11693 8268
encoding utf-8
Sheet 1 1
Title ""
Date ""
Rev ""
Comp ""
Comment1 ""
Comment2 ""
Comment3 ""
Comment4 ""
$EndDescr
$Comp
L CONN_02X08 Panel-1
U 1 1 54ECB236
P 6950 2550
F 0 "Panel-1" H 6950 3000 50 0000 C CNN
F 1 "CONN_02X08" V 6950 2550 50 0000 C CNN
F 2 "Pin_Headers:Pin_Header_Straight_2x08" H 6950 1350 60 0001 C CNN
F 3 "" H 6950 1350 60 0000 C CNN
1 6950 2550
1 0 0 -1
$EndComp
$Comp
L CONN_02X20 P1
U 1 1 54ECB2B7
P 4500 3700
F 0 "P1" H 4500 4750 50 0000 C CNN
F 1 "CONN_02X20" V 4500 3700 50 0000 C CNN
F 2 "Pin_Headers:Pin_Header_Straight_2x20" H 4500 2750 60 0001 C CNN
F 3 "" H 4500 2750 60 0000 C CNN
1 4500 3700
1 0 0 -1
$EndComp
Wire Wire Line
4800 2700 4800 2850
Wire Wire Line
4750 2750 4950 2750
Wire Wire Line
4800 2850 4750 2850
Connection ~ 4800 2750
$Comp
L GND #PWR01
U 1 1 54ECB3E1
P 4850 3350
F 0 "#PWR01" H 4850 3350 30 0001 C CNN
F 1 "GND" H 4850 3280 30 0001 C CNN
F 2 "" H 4850 3350 60 0000 C CNN
F 3 "" H 4850 3350 60 0000 C CNN
1 4850 3350
0 -1 -1 0
$EndComp
Wire Wire Line
4750 3350 4850 3350
$Comp
L GND #PWR02
U 1 1 54ECB417
P 4850 3650
F 0 "#PWR02" H 4850 3650 30 0001 C CNN
F 1 "GND" H 4850 3580 30 0001 C CNN
F 2 "" H 4850 3650 60 0000 C CNN
F 3 "" H 4850 3650 60 0000 C CNN
1 4850 3650
0 -1 -1 0
$EndComp
Wire Wire Line
4750 3650 4850 3650
$Comp
L GND #PWR03
U 1 1 54ECB4A1
P 4850 2950
F 0 "#PWR03" H 4850 2950 30 0001 C CNN
F 1 "GND" H 4850 2880 30 0001 C CNN
F 2 "" H 4850 2950 60 0000 C CNN
F 3 "" H 4850 2950 60 0000 C CNN
1 4850 2950
0 -1 -1 0
$EndComp
Wire Wire Line
4750 2950 4850 2950
$Comp
L GND #PWR04
U 1 1 54ECB5FE
P 4150 4650
F 0 "#PWR04" H 4150 4650 30 0001 C CNN
F 1 "GND" H 4150 4580 30 0001 C CNN
F 2 "" H 4150 4650 60 0000 C CNN
F 3 "" H 4150 4650 60 0000 C CNN
1 4150 4650
0 1 1 0
$EndComp
Wire Wire Line
4150 4650 4250 4650
$Comp
L GND #PWR05
U 1 1 54ECB73E
P 4850 4350
F 0 "#PWR05" H 4850 4350 30 0001 C CNN
F 1 "GND" H 4850 4280 30 0001 C CNN
F 2 "" H 4850 4350 60 0000 C CNN
F 3 "" H 4850 4350 60 0000 C CNN
1 4850 4350
0 -1 -1 0
$EndComp
Wire Wire Line
4750 4350 4850 4350
$Comp
L GND #PWR06
U 1 1 54ECB7BC
P 4150 3950
F 0 "#PWR06" H 4150 3950 30 0001 C CNN
F 1 "GND" H 4150 3880 30 0001 C CNN
F 2 "" H 4150 3950 60 0000 C CNN
F 3 "" H 4150 3950 60 0000 C CNN
1 4150 3950
0 1 1 0
$EndComp
Wire Wire Line
4150 3950 4250 3950
Text GLabel 4250 3050 0 51 Output ~ 0
strobe
Text GLabel 4750 4250 2 51 Output ~ 0
p1_r1
Text GLabel 4250 4150 0 51 Output ~ 0
p1_g1
Text GLabel 4250 4250 0 51 Output ~ 0
p1_b1
Text GLabel 4250 4450 0 51 Output ~ 0
p1_r2
Text GLabel 4250 4350 0 51 Output ~ 0
p1_g2
Text GLabel 4750 4550 2 51 Output ~ 0
p1_b2
Text GLabel 4250 3450 0 51 Output ~ 0
row_A
Text GLabel 4750 3450 2 51 Output ~ 0
row_B
Text GLabel 4750 3550 2 51 Output ~ 0
row_C
Text GLabel 4750 3750 2 51 Output ~ 0
row_D
Text GLabel 4250 3250 0 51 Output ~ 0
clock
Text GLabel 4250 3850 0 51 Output ~ 0
p0_r1
Text GLabel 4250 3350 0 51 Output ~ 0
p0_g1
Text GLabel 4750 3950 2 51 Output ~ 0
p0_b1
Text GLabel 4750 3850 2 51 Output ~ 0
p0_r2
Text GLabel 4250 3750 0 51 Output ~ 0
p0_g2
Text GLabel 4250 3650 0 51 Output ~ 0
p0_b2
Text GLabel 4750 3250 2 51 Output ~ 0
OE
Wire Wire Line
7200 2500 7750 2500
$Comp
L GND #PWR07
U 1 1 54ECD031
P 7750 2950
F 0 "#PWR07" H 7750 2950 30 0001 C CNN
F 1 "GND" H 7750 2880 30 0001 C CNN
F 2 "" H 7750 2950 60 0000 C CNN
F 3 "" H 7750 2950 60 0000 C CNN
1 7750 2950
1 0 0 -1
$EndComp
Wire Wire Line
7200 2900 7750 2900
Wire Wire Line
7200 2300 7750 2300
$Comp
L CONN_02X08 Panel-2
U 1 1 54ECE201
P 6950 3800
F 0 "Panel-2" H 6950 4250 50 0000 C CNN
F 1 "CONN_02X08" V 6950 3800 50 0000 C CNN
F 2 "Pin_Headers:Pin_Header_Straight_2x08" H 6950 2600 60 0001 C CNN
F 3 "" H 6950 2600 60 0000 C CNN
1 6950 3800
1 0 0 -1
$EndComp
Wire Wire Line
7200 3750 7750 3750
$Comp
L GND #PWR08
U 1 1 54ECE20E
P 7750 4200
F 0 "#PWR08" H 7750 4200 30 0001 C CNN
F 1 "GND" H 7750 4130 30 0001 C CNN
F 2 "" H 7750 4200 60 0000 C CNN
F 3 "" H 7750 4200 60 0000 C CNN
1 7750 4200
1 0 0 -1
$EndComp
Wire Wire Line
7200 4150 7750 4150
Wire Wire Line
7200 3550 7750 3550
$Comp
L VCC #PWR09
U 1 1 54ECD3DE
P 4800 2700
F 0 "#PWR09" H 4800 2800 30 0001 C CNN
F 1 "VCC" H 4800 2800 30 0000 C CNN
F 2 "" H 4800 2700 60 0000 C CNN
F 3 "" H 4800 2700 60 0000 C CNN
1 4800 2700
1 0 0 -1
$EndComp
Text GLabel 7200 3650 2 51 Input ~ 0
p1_g2
Wire Wire Line
7750 3550 7750 4200
Connection ~ 7750 4150
Connection ~ 7750 3750
Text GLabel 7200 3450 2 51 Input ~ 0
p1_g1
Wire Wire Line
7750 2300 7750 2950
Connection ~ 7750 2500
Connection ~ 7750 2900
Text GLabel 7200 2400 2 51 Input ~ 0
p0_g2
Text GLabel 7200 2200 2 51 Input ~ 0
p0_g1
Text GLabel 7200 2700 2 51 Input ~ 0
row_D
Text GLabel 7200 2600 2 51 Input ~ 0
row_B
Text GLabel 7200 3850 2 51 Input ~ 0
row_B
Text GLabel 7200 3950 2 51 Input ~ 0
row_D
Text GLabel 6700 2200 0 51 Input ~ 0
p0_r1
Text GLabel 6700 2800 0 51 Input ~ 0
clock
Text GLabel 6700 2500 0 51 Input ~ 0
p0_b2
Text GLabel 6700 2300 0 51 Input ~ 0
p0_b1
Text GLabel 6700 2400 0 51 Input ~ 0
p0_r2
Text GLabel 6700 2900 0 51 Input ~ 0
OE
Text GLabel 6700 3450 0 51 Input ~ 0
p1_r1
Text GLabel 6700 3550 0 51 Input ~ 0
p1_b1
Text GLabel 6700 3650 0 51 Input ~ 0
p1_r2
Text GLabel 6700 3750 0 51 Input ~ 0
p1_b2
Text GLabel 6700 4050 0 51 Input ~ 0
clock
Text GLabel 6700 4150 0 51 Input ~ 0
OE
Text GLabel 4750 3050 2 51 Output ~ 0
p2_r1
Text GLabel 4250 2850 0 51 Output ~ 0
p2_g1
Text GLabel 4250 2950 0 51 Output ~ 0
p2_b1
Text GLabel 4250 4550 0 51 Output ~ 0
p2_r2
Text GLabel 4750 4450 2 51 Output ~ 0
p2_g2
Text GLabel 4750 4650 2 51 Output ~ 0
p2_b2
Text GLabel 6700 3850 0 51 Input ~ 0
row_A
Text GLabel 6700 3950 0 51 Input ~ 0
row_C
Text GLabel 6700 2600 0 51 Input ~ 0
row_A
Text GLabel 6700 2700 0 51 Input ~ 0
row_C
Text GLabel 7200 4050 2 51 Input ~ 0
strobe
Text GLabel 7200 2800 2 51 Input ~ 0
strobe
$Comp
L CONN_02X08 Panel-3
U 1 1 54F3E6D5
P 6950 5250
F 0 "Panel-3" H 6950 5700 50 0000 C CNN
F 1 "CONN_02X08" V 6950 5250 50 0000 C CNN
F 2 "Pin_Headers:Pin_Header_Straight_2x08" H 6950 4050 60 0001 C CNN
F 3 "" H 6950 4050 60 0000 C CNN
1 6950 5250
1 0 0 -1
$EndComp
Wire Wire Line
7200 5200 7750 5200
$Comp
L GND #PWR010
U 1 1 54F3E6DC
P 7750 5650
F 0 "#PWR010" H 7750 5650 30 0001 C CNN
F 1 "GND" H 7750 5580 30 0001 C CNN
F 2 "" H 7750 5650 60 0000 C CNN
F 3 "" H 7750 5650 60 0000 C CNN
1 7750 5650
1 0 0 -1
$EndComp
Wire Wire Line
7200 5600 7750 5600
Wire Wire Line
7200 5000 7750 5000
Text GLabel 7200 5100 2 51 Input ~ 0
p2_g2
Wire Wire Line
7750 5000 7750 5650
Connection ~ 7750 5600
Connection ~ 7750 5200
Text GLabel 7200 4900 2 51 Input ~ 0
p2_g1
Text GLabel 7200 5300 2 51 Input ~ 0
row_B
Text GLabel 7200 5400 2 51 Input ~ 0
row_D
Text GLabel 6700 4900 0 51 Input ~ 0
p2_r1
Text GLabel 6700 5000 0 51 Input ~ 0
p2_b1
Text GLabel 6700 5100 0 51 Input ~ 0
p2_r2
Text GLabel 6700 5200 0 51 Input ~ 0
p2_b2
Text GLabel 6700 5500 0 51 Input ~ 0
clock
Text GLabel 6700 5600 0 51 Input ~ 0
OE
Text GLabel 6700 5300 0 51 Input ~ 0
row_A
Text GLabel 6700 5400 0 51 Input ~ 0
row_C
Text GLabel 7200 5500 2 51 Input ~ 0
strobe
NoConn ~ 4250 2750
NoConn ~ 4250 3150
NoConn ~ 4250 3550
NoConn ~ 4250 4050
NoConn ~ 4750 4050
NoConn ~ 4750 4150
NoConn ~ 4750 3150
$Comp
L PWR_FLAG #FLG011
U 1 1 557B29FD
P 4950 2750
F 0 "#FLG011" H 4950 2845 50 0001 C CNN
F 1 "PWR_FLAG" H 4950 2930 50 0000 C CNN
F 2 "" H 4950 2750 60 0000 C CNN
F 3 "" H 4950 2750 60 0000 C CNN
1 4950 2750
1 0 0 -1
$EndComp
$Comp
L PWR_FLAG #FLG012
U 1 1 557B2BFC
P 4200 4700
F 0 "#FLG012" H 4200 4795 50 0001 C CNN
F 1 "PWR_FLAG" H 4200 4880 50 0000 C CNN
F 2 "" H 4200 4700 60 0000 C CNN
F 3 "" H 4200 4700 60 0000 C CNN
1 4200 4700
-1 0 0 1
$EndComp
Wire Wire Line
4200 4650 4200 4700
Connection ~ 4200 4650
$EndSCHEMATC

16
adapter/passive-rpi1/README.md Normal file
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@ -0,0 +1,16 @@
Adapter PCB to connect to Rasbperry Pi1
=======================================
* Passive board. Simple, but might need to define `RGB_SLOWDOWN_GPIO` if you see
glitches.
* Supports one panel connected to a 26 pin Raspberry Pi 1. If you have a newer RPi,
check out the [Passive 3](../passive-3) or [Active 3](../active-3) adapter.
* Open source KiCAD PCB EDA format.
* (not very pretty layout, was just lazy and let the auto-router do it).
You can [buy the board from OSH Park][osh-passive-rpi].
![Preview][rendering]
[rendering]: ../../img/passive-rpi1-pcb.png
[osh-passive-rpi]: https://oshpark.com/shared_projects/afEA1gNt

150
adapter/passive-rpi1/passive-rpi-hub75-adapter-cache.lib Normal file
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EESchema-LIBRARY Version 2.3
#encoding utf-8
#
# CONN_02X08
#
DEF CONN_02X08 P 0 1 Y N 1 F N
F0 "P" 0 450 50 H V C CNN
F1 "CONN_02X08" 0 0 50 V V C CNN
F2 "" 0 -1200 60 H V C CNN
F3 "" 0 -1200 60 H V C CNN
$FPLIST
Pin_Header_Straight_2X08
Pin_Header_Angled_2X08
Socket_Strip_Straight_2X08
Socket_Strip_Angled_2X08
$ENDFPLIST
DRAW
S -100 -345 -50 -355 0 1 0 N
S -100 -245 -50 -255 0 1 0 N
S -100 -145 -50 -155 0 1 0 N
S -100 -45 -50 -55 0 1 0 N
S -100 55 -50 45 0 1 0 N
S -100 155 -50 145 0 1 0 N
S -100 255 -50 245 0 1 0 N
S -100 355 -50 345 0 1 0 N
S -100 400 100 -400 0 1 0 N
S 50 -345 100 -355 0 1 0 N
S 50 -245 100 -255 0 1 0 N
S 50 -145 100 -155 0 1 0 N
S 50 -45 100 -55 0 1 0 N
S 50 55 100 45 0 1 0 N
S 50 155 100 145 0 1 0 N
S 50 255 100 245 0 1 0 N
S 50 355 100 345 0 1 0 N
X P1 1 -250 350 150 R 50 50 1 1 P
X P2 2 250 350 150 L 50 50 1 1 P
X P3 3 -250 250 150 R 50 50 1 1 P
X P4 4 250 250 150 L 50 50 1 1 P
X P5 5 -250 150 150 R 50 50 1 1 P
X P6 6 250 150 150 L 50 50 1 1 P
X P7 7 -250 50 150 R 50 50 1 1 P
X P8 8 250 50 150 L 50 50 1 1 P
X P9 9 -250 -50 150 R 50 50 1 1 P
X P10 10 250 -50 150 L 50 50 1 1 P
X P11 11 -250 -150 150 R 50 50 1 1 P
X P12 12 250 -150 150 L 50 50 1 1 P
X P13 13 -250 -250 150 R 50 50 1 1 P
X P14 14 250 -250 150 L 50 50 1 1 P
X P15 15 -250 -350 150 R 50 50 1 1 P
X P16 16 250 -350 150 L 50 50 1 1 P
ENDDRAW
ENDDEF
#
# CONN_02X13
#
DEF CONN_02X13 P 0 1 Y N 1 F N
F0 "P" 0 700 50 H V C CNN
F1 "CONN_02X13" 0 0 50 V V C CNN
F2 "" 0 -1150 60 H V C CNN
F3 "" 0 -1150 60 H V C CNN
$FPLIST
Pin_Header_Straight_2X13
Pin_Header_Angled_2X13
Socket_Strip_Straight_2X13
Socket_Strip_Angled_2X13
$ENDFPLIST
DRAW
S -100 -595 -50 -605 0 1 0 N
S -100 -495 -50 -505 0 1 0 N
S -100 -395 -50 -405 0 1 0 N
S -100 -295 -50 -305 0 1 0 N
S -100 -195 -50 -205 0 1 0 N
S -100 -95 -50 -105 0 1 0 N
S -100 5 -50 -5 0 1 0 N
S -100 105 -50 95 0 1 0 N
S -100 205 -50 195 0 1 0 N
S -100 305 -50 295 0 1 0 N
S -100 405 -50 395 0 1 0 N
S -100 505 -50 495 0 1 0 N
S -100 605 -50 595 0 1 0 N
S -100 650 100 -650 0 1 0 N
S 50 -595 100 -605 0 1 0 N
S 50 -495 100 -505 0 1 0 N
S 50 -395 100 -405 0 1 0 N
S 50 -295 100 -305 0 1 0 N
S 50 -195 100 -205 0 1 0 N
S 50 -95 100 -105 0 1 0 N
S 50 5 100 -5 0 1 0 N
S 50 105 100 95 0 1 0 N
S 50 205 100 195 0 1 0 N
S 50 305 100 295 0 1 0 N
S 50 405 100 395 0 1 0 N
S 50 505 100 495 0 1 0 N
S 50 605 100 595 0 1 0 N
X P1 1 -250 600 150 R 50 50 1 1 P
X P2 2 250 600 150 L 50 50 1 1 P
X P3 3 -250 500 150 R 50 50 1 1 P
X P4 4 250 500 150 L 50 50 1 1 P
X P5 5 -250 400 150 R 50 50 1 1 P
X P6 6 250 400 150 L 50 50 1 1 P
X P7 7 -250 300 150 R 50 50 1 1 P
X P8 8 250 300 150 L 50 50 1 1 P
X P9 9 -250 200 150 R 50 50 1 1 P
X P10 10 250 200 150 L 50 50 1 1 P
X P20 20 250 -300 150 L 50 50 1 1 P
X P11 11 -250 100 150 R 50 50 1 1 P
X P21 21 -250 -400 150 R 50 50 1 1 P
X P12 12 250 100 150 L 50 50 1 1 P
X P22 22 250 -400 150 L 50 50 1 1 P
X P13 13 -250 0 150 R 50 50 1 1 P
X P23 23 -250 -500 150 R 50 50 1 1 P
X P14 14 250 0 150 L 50 50 1 1 P
X P24 24 250 -500 150 L 50 50 1 1 P
X P15 15 -250 -100 150 R 50 50 1 1 P
X P25 25 -250 -600 150 R 50 50 1 1 P
X P16 16 250 -100 150 L 50 50 1 1 P
X P26 26 250 -600 150 L 50 50 1 1 P
X P17 17 -250 -200 150 R 50 50 1 1 P
X P18 18 250 -200 150 L 50 50 1 1 P
X P19 19 -250 -300 150 R 50 50 1 1 P
ENDDRAW
ENDDEF
#
# GND
#
DEF GND #PWR 0 0 Y Y 1 F P
F0 "#PWR" 0 -250 50 H I C CNN
F1 "GND" 0 -150 50 H V C CNN
F2 "" 0 0 60 H V C CNN
F3 "" 0 0 60 H V C CNN
DRAW
P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N
X GND 1 0 0 0 D 50 50 1 1 W N
ENDDRAW
ENDDEF
#
# PWR_FLAG
#
DEF PWR_FLAG #FLG 0 0 N N 1 F P
F0 "#FLG" 0 95 50 H I C CNN
F1 "PWR_FLAG" 0 180 50 H V C CNN
F2 "" 0 0 60 H V C CNN
F3 "" 0 0 60 H V C CNN
DRAW
X pwr 1 0 0 0 U 20 20 0 0 w
P 6 0 1 0 0 0 0 50 -75 100 0 150 75 100 0 50 N
ENDDRAW
ENDDEF
#
#End Library

589
adapter/passive-rpi1/passive-rpi-hub75-adapter.kicad_pcb Normal file
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(kicad_pcb (version 4) (host pcbnew "(after 2015-may-25 BZR unknown)-product")
(general
(links 19)
(no_connects 0)
(area 81.018619 38.449999 122.550001 57.550001)
(thickness 1.6)
(drawings 8)
(tracks 128)
(zones 0)
(modules 2)
(nets 15)
)
(page A4)
(layers
(0 F.Cu signal)
(31 B.Cu signal)
(32 B.Adhes user)
(33 F.Adhes user)
(34 B.Paste user)
(35 F.Paste user)
(36 B.SilkS user)
(37 F.SilkS user)
(38 B.Mask user)
(39 F.Mask user)
(40 Dwgs.User user)
(41 Cmts.User user)
(42 Eco1.User user)
(43 Eco2.User user)
(44 Edge.Cuts user)
(45 Margin user)
(46 B.CrtYd user)
(47 F.CrtYd user)
(48 B.Fab user)
(49 F.Fab user)
)
(setup
(last_trace_width 0.254)
(trace_clearance 0.254)
(zone_clearance 0.508)
(zone_45_only no)
(trace_min 0.254)
(segment_width 0.2)
(edge_width 0.1)
(via_size 0.889)
(via_drill 0.635)
(via_min_size 0.889)
(via_min_drill 0.508)
(uvia_size 0.508)
(uvia_drill 0.127)
(uvias_allowed no)
(uvia_min_size 0.508)
(uvia_min_drill 0.127)
(pcb_text_width 0.3)
(pcb_text_size 1.5 1.5)
(mod_edge_width 0.15)
(mod_text_size 1 1)
(mod_text_width 0.15)
(pad_size 4.064 4.064)
(pad_drill 3.048)
(pad_to_mask_clearance 0)
(aux_axis_origin 0 0)
(visible_elements FFFFEF7F)
(pcbplotparams
(layerselection 0x010f0_80000001)
(usegerberextensions true)
(excludeedgelayer true)
(linewidth 0.100000)
(plotframeref false)
(viasonmask false)
(mode 1)
(useauxorigin false)
(hpglpennumber 1)
(hpglpenspeed 20)
(hpglpendiameter 15)
(hpglpenoverlay 2)
(psnegative false)
(psa4output false)
(plotreference true)
(plotvalue true)
(plotinvisibletext false)
(padsonsilk false)
(subtractmaskfromsilk false)
(outputformat 1)
(mirror false)
(drillshape 0)
(scaleselection 1)
(outputdirectory fab/))
)
(net 0 "")
(net 1 GND)
(net 2 strobe)
(net 3 p0_r1)
(net 4 p0_g1)
(net 5 OE)
(net 6 p0_b1)
(net 7 p0_r2)
(net 8 p0_g2)
(net 9 row_D)
(net 10 row_C)
(net 11 p0_b2)
(net 12 clock)
(net 13 row_B)
(net 14 row_A)
(net_class Default "This is the default net class."
(clearance 0.254)
(trace_width 0.254)
(via_dia 0.889)
(via_drill 0.635)
(uvia_dia 0.508)
(uvia_drill 0.127)
(add_net OE)
(add_net clock)
(add_net p0_b1)
(add_net p0_b2)
(add_net p0_g1)
(add_net p0_g2)
(add_net p0_r1)
(add_net p0_r2)
(add_net row_A)
(add_net row_B)
(add_net row_C)
(add_net row_D)
(add_net strobe)
)
(net_class power ""
(clearance 0.254)
(trace_width 0.254)
(via_dia 0.889)
(via_drill 0.635)
(uvia_dia 0.508)
(uvia_drill 0.127)
(add_net GND)
)
(module Pin_Headers:Pin_Header_Straight_2x08 (layer F.Cu) (tedit 557E1BCB) (tstamp 54F3AB27)
(at 95.25 53.34 90)
(descr "Through hole pin header")
(tags "pin header")
(path /54ECB236)
(fp_text reference Panel-1 (at 1.27 -2.54 90) (layer F.SilkS) hide
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value CONN_02X08 (at 0 -3.1 90) (layer F.SilkS) hide
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start -1.75 -1.75) (end -1.75 19.55) (layer F.CrtYd) (width 0.05))
(fp_line (start 4.3 -1.75) (end 4.3 19.55) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.75 -1.75) (end 4.3 -1.75) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.75 19.55) (end 4.3 19.55) (layer F.CrtYd) (width 0.05))
(fp_line (start 3.81 19.05) (end 3.81 -1.27) (layer F.SilkS) (width 0.15))
(fp_line (start -1.27 1.27) (end -1.27 19.05) (layer F.SilkS) (width 0.15))
(fp_line (start 3.81 19.05) (end -1.27 19.05) (layer F.SilkS) (width 0.15))
(fp_line (start 3.81 -1.27) (end 1.27 -1.27) (layer F.SilkS) (width 0.15))
(fp_line (start 0 -1.55) (end -1.55 -1.55) (layer F.SilkS) (width 0.15))
(fp_line (start 1.27 -1.27) (end 1.27 1.27) (layer F.SilkS) (width 0.15))
(fp_line (start 1.27 1.27) (end -1.27 1.27) (layer F.SilkS) (width 0.15))
(fp_line (start -1.55 -1.55) (end -1.55 0) (layer F.SilkS) (width 0.15))
(pad 1 thru_hole rect (at 0 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 3 p0_r1))
(pad 2 thru_hole oval (at 2.54 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 4 p0_g1))
(pad 3 thru_hole oval (at 0 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 6 p0_b1))
(pad 4 thru_hole oval (at 2.54 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 1 GND))
(pad 5 thru_hole oval (at 0 5.08 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 7 p0_r2))
(pad 6 thru_hole oval (at 2.54 5.08 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 8 p0_g2))
(pad 7 thru_hole oval (at 0 7.62 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 11 p0_b2))
(pad 8 thru_hole oval (at 2.54 7.62 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 1 GND))
(pad 9 thru_hole oval (at 0 10.16 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 14 row_A))
(pad 10 thru_hole oval (at 2.54 10.16 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 13 row_B))
(pad 11 thru_hole oval (at 0 12.7 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 10 row_C))
(pad 12 thru_hole oval (at 2.54 12.7 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 9 row_D))
(pad 13 thru_hole oval (at 0 15.24 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 12 clock))
(pad 14 thru_hole oval (at 2.54 15.24 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 2 strobe))
(pad 15 thru_hole oval (at 0 17.78 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 5 OE))
(pad 16 thru_hole oval (at 2.54 17.78 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 1 GND))
(model Pin_Headers.3dshapes/Pin_Header_Straight_2x08.wrl
(at (xyz 0.05 -0.35 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 90))
)
)
(module Pin_Headers:Pin_Header_Straight_2x13 (layer F.Cu) (tedit 557E1BBF) (tstamp 557E12E7)
(at 88.9 43.815 90)
(descr "Through hole pin header")
(tags "pin header")
(path /54ECB2B7)
(fp_text reference P1 (at -2.413 -0.508 180) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value RPi-Header (at -0.381 -4.064 90) (layer F.Fab) hide
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57
adapter/passive/passive-rpi-hub75-adapter.pro → adapter/passive-rpi1/passive-rpi-hub75-adapter.pro
View file

@ -1,4 +1,4 @@
update=Sun 01 Mar 2015 12:27:26 AM PST
update=Sun 14 Jun 2015 04:45:24 PM PDT
version=1
last_client=kicad
[cvpcb]
@ -6,14 +6,11 @@ version=1
NetIExt=net
[cvpcb/libraries]
EquName1=devcms
[general]
version=1
[eeschema]
version=1
LibDir=
NetFmtName=
RptD_X=0
RptD_Y=100
RptLab=1
LabSize=60
[eeschema/libraries]
LibName1=power
LibName2=device
@ -26,36 +23,32 @@ LibName8=cmos4000
LibName9=adc-dac
LibName10=memory
LibName11=xilinx
LibName12=special
LibName13=microcontrollers
LibName14=dsp
LibName15=microchip
LibName16=analog_switches
LibName17=motorola
LibName18=texas
LibName19=intel
LibName20=audio
LibName21=interface
LibName22=digital-audio
LibName23=philips
LibName24=display
LibName25=cypress
LibName26=siliconi
LibName27=opto
LibName28=atmel
LibName29=contrib
LibName30=valves
[general]
version=1
LibName12=microcontrollers
LibName13=dsp
LibName14=microchip
LibName15=analog_switches
LibName16=motorola
LibName17=texas
LibName18=intel
LibName19=audio
LibName20=interface
LibName21=digital-audio
LibName22=philips
LibName23=display
LibName24=cypress
LibName25=siliconi
LibName26=opto
LibName27=atmel
LibName28=contrib
LibName29=valves
[pcbnew]
version=1
PageLayoutDescrFile=
LastNetListRead=
UseCmpFile=1
PadDrill=0.6
PadDrillOvalY=0.6
PadSizeH=1.5
PadSizeV=1.5
PadDrill=3.048
PadDrillOvalY=3.048
PadSizeH=4.064
PadSizeV=4.064
PcbTextSizeV=1.5
PcbTextSizeH=1.5
PcbTextThickness=0.3

215
adapter/passive-rpi1/passive-rpi-hub75-adapter.sch Normal file
View file

@ -0,0 +1,215 @@
EESchema Schematic File Version 2
LIBS:power
LIBS:device
LIBS:transistors
LIBS:conn
LIBS:linear
LIBS:regul
LIBS:74xx
LIBS:cmos4000
LIBS:adc-dac
LIBS:memory
LIBS:xilinx
LIBS:microcontrollers
LIBS:dsp
LIBS:microchip
LIBS:analog_switches
LIBS:motorola
LIBS:texas
LIBS:intel
LIBS:audio
LIBS:interface
LIBS:digital-audio
LIBS:philips
LIBS:display
LIBS:cypress
LIBS:siliconi
LIBS:opto
LIBS:atmel
LIBS:contrib
LIBS:valves
EELAYER 25 0
EELAYER END
$Descr A4 11693 8268
encoding utf-8
Sheet 1 1
Title ""
Date ""
Rev ""
Comp ""
Comment1 ""
Comment2 ""
Comment3 ""
Comment4 ""
$EndDescr
$Comp
L CONN_02X08 Panel-1
U 1 1 54ECB236
P 6000 3450
F 0 "Panel-1" H 6000 3900 50 0000 C CNN
F 1 "CONN_02X08" V 6000 3450 50 0000 C CNN
F 2 "Pin_Headers:Pin_Header_Straight_2x08" H 6000 2250 60 0001 C CNN
F 3 "" H 6000 2250 60 0000 C CNN
1 6000 3450
1 0 0 -1
$EndComp
$Comp
L CONN_02X13 P1
U 1 1 54ECB2B7
P 4500 3350
F 0 "P1" H 4500 4100 50 0000 C CNN
F 1 "RPi-Header" V 4500 3350 50 0000 C CNN
F 2 "Pin_Headers:Pin_Header_Straight_2x13" H 4500 2400 60 0001 C CNN
F 3 "" H 4500 2400 60 0000 C CNN
1 4500 3350
1 0 0 -1
$EndComp
$Comp
L GND #PWR01
U 1 1 54ECB3E1
P 4850 3350
F 0 "#PWR01" H 4850 3350 30 0001 C CNN
F 1 "GND" H 4850 3280 30 0001 C CNN
F 2 "" H 4850 3350 60 0000 C CNN
F 3 "" H 4850 3350 60 0000 C CNN
1 4850 3350
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$EndComp
Wire Wire Line
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$Comp
L GND #PWR02
U 1 1 54ECB417
P 4850 3650
F 0 "#PWR02" H 4850 3650 30 0001 C CNN
F 1 "GND" H 4850 3580 30 0001 C CNN
F 2 "" H 4850 3650 60 0000 C CNN
F 3 "" H 4850 3650 60 0000 C CNN
1 4850 3650
0 -1 -1 0
$EndComp
Wire Wire Line
4750 3650 4850 3650
$Comp
L GND #PWR03
U 1 1 54ECB4A1
P 4850 2950
F 0 "#PWR03" H 4850 2950 30 0001 C CNN
F 1 "GND" H 4850 2880 30 0001 C CNN
F 2 "" H 4850 2950 60 0000 C CNN
F 3 "" H 4850 2950 60 0000 C CNN
1 4850 2950
0 -1 -1 0
$EndComp
Wire Wire Line
4750 2950 4850 2950
$Comp
L GND #PWR04
U 1 1 54ECB7BC
P 4150 3950
F 0 "#PWR04" H 4150 3950 30 0001 C CNN
F 1 "GND" H 4150 3880 30 0001 C CNN
F 2 "" H 4150 3950 60 0000 C CNN
F 3 "" H 4150 3950 60 0000 C CNN
1 4150 3950
0 1 1 0
$EndComp
Wire Wire Line
4150 3950 4250 3950
Text GLabel 4250 3050 0 51 Output ~ 0
strobe
Text GLabel 4250 3450 0 51 Output ~ 0
row_A
Text GLabel 4750 3450 2 51 Output ~ 0
row_B
Text GLabel 4750 3550 2 51 Output ~ 0
row_C
Text GLabel 4750 3750 2 51 Output ~ 0
row_D
Text GLabel 4250 3250 0 51 Output ~ 0
clock
Text GLabel 4250 3850 0 51 Output ~ 0
p0_r1
Text GLabel 4250 3350 0 51 Output ~ 0
p0_g1
Text GLabel 4750 3950 2 51 Output ~ 0
p0_b1
Text GLabel 4750 3850 2 51 Output ~ 0
p0_r2
Text GLabel 4250 3750 0 51 Output ~ 0
p0_g2
Text GLabel 4250 3650 0 51 Output ~ 0
p0_b2
Text GLabel 4750 3250 2 51 Output ~ 0
OE
Wire Wire Line
6250 3400 6800 3400
$Comp
L GND #PWR05
U 1 1 54ECD031
P 6800 3850
F 0 "#PWR05" H 6800 3850 30 0001 C CNN
F 1 "GND" H 6800 3780 30 0001 C CNN
F 2 "" H 6800 3850 60 0000 C CNN
F 3 "" H 6800 3850 60 0000 C CNN
1 6800 3850
1 0 0 -1
$EndComp
Wire Wire Line
6250 3800 6800 3800
Wire Wire Line
6250 3200 6800 3200
Wire Wire Line
6800 3200 6800 3850
Connection ~ 6800 3400
Connection ~ 6800 3800
Text GLabel 6250 3300 2 51 Input ~ 0
p0_g2
Text GLabel 6250 3100 2 51 Input ~ 0
p0_g1
Text GLabel 6250 3600 2 51 Input ~ 0
row_D
Text GLabel 6250 3500 2 51 Input ~ 0
row_B
Text GLabel 5750 3100 0 51 Input ~ 0
p0_r1
Text GLabel 5750 3700 0 51 Input ~ 0
clock
Text GLabel 5750 3400 0 51 Input ~ 0
p0_b2
Text GLabel 5750 3200 0 51 Input ~ 0
p0_b1
Text GLabel 5750 3300 0 51 Input ~ 0
p0_r2
Text GLabel 5750 3800 0 51 Input ~ 0
OE
Text GLabel 5750 3500 0 51 Input ~ 0
row_A
Text GLabel 5750 3600 0 51 Input ~ 0
row_C
Text GLabel 6250 3700 2 51 Input ~ 0
strobe
NoConn ~ 4250 2750
NoConn ~ 4250 3150
NoConn ~ 4250 3550
NoConn ~ 4750 3150
NoConn ~ 4750 2750
NoConn ~ 4750 2850
NoConn ~ 4250 2850
NoConn ~ 4250 2950
NoConn ~ 4750 3050
$Comp
L PWR_FLAG #FLG06
U 1 1 557E1359
P 4200 4050
F 0 "#FLG06" H 4200 4145 50 0001 C CNN
F 1 "PWR_FLAG" H 4200 4230 50 0000 C CNN
F 2 "" H 4200 4050 60 0000 C CNN
F 3 "" H 4200 4050 60 0000 C CNN
1 4200 4050
-1 0 0 1
$EndComp
Wire Wire Line
4200 3950 4200 4050
Connection ~ 4200 3950
$EndSCHEMATC

22
adapter/passive/README.md
View file

@ -1,22 +0,0 @@
Passive Adapter PCB to support up to 2 panels
=============================================
* Supports one panel for Raspberry PIs with 26 GPIO pins and two
panels for newer plus models and Raspberry Pi 2 that have 40 GPIO pins.
* This board is passive, so it does not need any more components than the
connectors. If you have trouble with erratic pixels or need to connect
long cables, then level shifting and buffering might help; check out
the active boards in this case.
* This supports two panels and provides convenient breakouts
for I²C and the serial interface.
* Open source KiCAD PCB EDA format.
For multiple parallel boards to work and using the I2C and serial interface you have to uncomment
#DEFINES+=-DSUPPORT_MULTI_PARALLEL # remove the '#' in the begging
in [lib/Makefile](../../lib/Makefile).
![Preview][rendering]
[rendering]: ../../img/passive2-pcb.png

1151
adapter/passive/passive-rpi-hub75-adapter.kicad_pcb
View file

File diff suppressed because it is too large Load diff

337
adapter/passive/passive-rpi-hub75-adapter.sch
View file

@ -1,337 +0,0 @@
EESchema Schematic File Version 2
LIBS:power
LIBS:device
LIBS:transistors
LIBS:conn
LIBS:linear
LIBS:regul
LIBS:74xx
LIBS:cmos4000
LIBS:adc-dac
LIBS:memory
LIBS:xilinx
LIBS:special
LIBS:microcontrollers
LIBS:dsp
LIBS:microchip
LIBS:analog_switches
LIBS:motorola
LIBS:texas
LIBS:intel
LIBS:audio
LIBS:interface
LIBS:digital-audio
LIBS:philips
LIBS:display
LIBS:cypress
LIBS:siliconi
LIBS:opto
LIBS:atmel
LIBS:contrib
LIBS:valves
EELAYER 25 0
EELAYER END
$Descr A4 11693 8268
encoding utf-8
Sheet 1 1
Title ""
Date ""
Rev ""
Comp ""
Comment1 ""
Comment2 ""
Comment3 ""
Comment4 ""
$EndDescr
$Comp
L CONN_02X08 Panel-1
U 1 1 54ECB236
P 5350 3100
F 0 "Panel-1" H 5350 3550 50 0000 C CNN
F 1 "CONN_02X08" V 5350 3100 50 0000 C CNN
F 2 "Pin_Headers:Pin_Header_Straight_2x08" H 5350 1900 60 0001 C CNN
F 3 "" H 5350 1900 60 0000 C CNN
1 5350 3100
1 0 0 -1
$EndComp
$Comp
L CONN_02X20 P1
U 1 1 54ECB2B7
P 3250 3650
F 0 "P1" H 3250 4700 50 0000 C CNN
F 1 "CONN_02X20" V 3250 3650 50 0000 C CNN
F 2 "Pin_Headers:Pin_Header_Straight_2x20" H 3250 2700 60 0001 C CNN
F 3 "" H 3250 2700 60 0000 C CNN
1 3250 3650
1 0 0 -1
$EndComp
Wire Wire Line
3550 2650 3550 2800
Wire Wire Line
3550 2700 3500 2700
Wire Wire Line
3550 2800 3500 2800
Connection ~ 3550 2700
$Comp
L GND #PWR01
U 1 1 54ECB3E1
P 3600 3300
F 0 "#PWR01" H 3600 3300 30 0001 C CNN
F 1 "GND" H 3600 3230 30 0001 C CNN
F 2 "" H 3600 3300 60 0000 C CNN
F 3 "" H 3600 3300 60 0000 C CNN
1 3600 3300
0 -1 -1 0
$EndComp
Wire Wire Line
3500 3300 3600 3300
$Comp
L GND #PWR02
U 1 1 54ECB417
P 3600 3600
F 0 "#PWR02" H 3600 3600 30 0001 C CNN
F 1 "GND" H 3600 3530 30 0001 C CNN
F 2 "" H 3600 3600 60 0000 C CNN
F 3 "" H 3600 3600 60 0000 C CNN
1 3600 3600
0 -1 -1 0
$EndComp
Wire Wire Line
3500 3600 3600 3600
$Comp
L GND #PWR03
U 1 1 54ECB4A1
P 3600 2900
F 0 "#PWR03" H 3600 2900 30 0001 C CNN
F 1 "GND" H 3600 2830 30 0001 C CNN
F 2 "" H 3600 2900 60 0000 C CNN
F 3 "" H 3600 2900 60 0000 C CNN
1 3600 2900
0 -1 -1 0
$EndComp
Wire Wire Line
3500 2900 3600 2900
$Comp
L GND #PWR04
U 1 1 54ECB5FE
P 2900 4600
F 0 "#PWR04" H 2900 4600 30 0001 C CNN
F 1 "GND" H 2900 4530 30 0001 C CNN
F 2 "" H 2900 4600 60 0000 C CNN
F 3 "" H 2900 4600 60 0000 C CNN
1 2900 4600
0 1 1 0
$EndComp
Wire Wire Line
2900 4600 3000 4600
$Comp
L GND #PWR05
U 1 1 54ECB73E
P 3600 4300
F 0 "#PWR05" H 3600 4300 30 0001 C CNN
F 1 "GND" H 3600 4230 30 0001 C CNN
F 2 "" H 3600 4300 60 0000 C CNN
F 3 "" H 3600 4300 60 0000 C CNN
1 3600 4300
0 -1 -1 0
$EndComp
Wire Wire Line
3500 4300 3600 4300
$Comp
L GND #PWR06
U 1 1 54ECB7BC
P 2900 3900
F 0 "#PWR06" H 2900 3900 30 0001 C CNN
F 1 "GND" H 2900 3830 30 0001 C CNN
F 2 "" H 2900 3900 60 0000 C CNN
F 3 "" H 2900 3900 60 0000 C CNN
1 2900 3900
0 1 1 0
$EndComp
Wire Wire Line
2900 3900 3000 3900
Text GLabel 3000 3000 0 51 Output ~ 0
strobe
Text GLabel 3500 4200 2 51 Output ~ 0
p1_r1
Text GLabel 3000 4100 0 51 Output ~ 0
p1_g1
Text GLabel 3000 4200 0 51 Output ~ 0
p1_b1
Text GLabel 3000 4400 0 51 Output ~ 0
p1_r2
Text GLabel 3000 4300 0 51 Output ~ 0
p1_g2
Text GLabel 3500 4500 2 51 Output ~ 0
p1_b2
Text GLabel 3500 3900 2 51 Output ~ 0
row_A
Text GLabel 3500 3800 2 51 Output ~ 0
row_B
Text GLabel 3000 3700 0 51 Output ~ 0
row_C
Text GLabel 3000 3600 0 51 Output ~ 0
row_D
Text GLabel 3000 3800 0 51 Output ~ 0
clock
Text GLabel 3000 3200 0 51 Output ~ 0
p0_r1
Text GLabel 3500 3200 2 51 Output ~ 0
p0_g1
Text GLabel 3000 3400 0 51 Output ~ 0
p0_b1
Text GLabel 3500 3400 2 51 Output ~ 0
p0_r2
Text GLabel 3500 3500 2 51 Output ~ 0
p0_g2
Text GLabel 3500 3700 2 51 Output ~ 0
p0_b2
Text GLabel 3000 3300 0 51 Output ~ 0
OE
Wire Wire Line
5600 3050 6150 3050
$Comp
L GND #PWR07
U 1 1 54ECD031
P 6150 3500
F 0 "#PWR07" H 6150 3500 30 0001 C CNN
F 1 "GND" H 6150 3430 30 0001 C CNN
F 2 "" H 6150 3500 60 0000 C CNN
F 3 "" H 6150 3500 60 0000 C CNN
1 6150 3500
1 0 0 -1
$EndComp
Wire Wire Line
5600 3450 6150 3450
Wire Wire Line
5600 2850 6150 2850
$Comp
L CONN_02X08 Panel-2
U 1 1 54ECE201
P 5350 4300
F 0 "Panel-2" H 5350 4750 50 0000 C CNN
F 1 "CONN_02X08" V 5350 4300 50 0000 C CNN
F 2 "Pin_Headers:Pin_Header_Straight_2x08" H 5350 3100 60 0001 C CNN
F 3 "" H 5350 3100 60 0000 C CNN
1 5350 4300
1 0 0 -1
$EndComp
Wire Wire Line
5600 4250 6150 4250
$Comp
L GND #PWR08
U 1 1 54ECE20E
P 6150 4700
F 0 "#PWR08" H 6150 4700 30 0001 C CNN
F 1 "GND" H 6150 4630 30 0001 C CNN
F 2 "" H 6150 4700 60 0000 C CNN
F 3 "" H 6150 4700 60 0000 C CNN
1 6150 4700
1 0 0 -1
$EndComp
Wire Wire Line
5600 4650 6150 4650
Wire Wire Line
5600 4050 6150 4050
$Comp
L VCC #PWR09
U 1 1 54ECD3DE
P 3550 2650
F 0 "#PWR09" H 3550 2750 30 0001 C CNN
F 1 "VCC" H 3550 2750 30 0000 C CNN
F 2 "" H 3550 2650 60 0000 C CNN
F 3 "" H 3550 2650 60 0000 C CNN
1 3550 2650
1 0 0 -1
$EndComp
$Comp
L CONN_01X02 P2
U 1 1 54ECE3B2
P 2650 2850
F 0 "P2" H 2650 3000 50 0000 C CNN
F 1 "CONN_01X02" V 2750 2850 50 0000 C CNN
F 2 "Pin_Headers:Pin_Header_Straight_1x02" H 2650 2850 60 0001 C CNN
F 3 "" H 2650 2850 60 0000 C CNN
1 2650 2850
-1 0 0 1
$EndComp
Wire Wire Line
2850 2800 3000 2800
Wire Wire Line
2850 2900 3000 2900
$Comp
L CONN_01X02 P3
U 1 1 54ECE47C
P 3850 3050
F 0 "P3" H 3850 3200 50 0000 C CNN
F 1 "CONN_01X02" V 3950 3050 50 0000 C CNN
F 2 "Pin_Headers:Pin_Header_Straight_1x02" H 3850 3050 60 0001 C CNN
F 3 "" H 3850 3050 60 0000 C CNN
1 3850 3050
1 0 0 -1
$EndComp
Wire Wire Line
3500 3000 3650 3000
Wire Wire Line
3500 3100 3650 3100
Text GLabel 5600 4150 2 51 Input ~ 0
p1_g2
Wire Wire Line
6150 4050 6150 4700
Connection ~ 6150 4650
Connection ~ 6150 4250
Text GLabel 5600 3950 2 51 Input ~ 0
p1_g1
Wire Wire Line
6150 2850 6150 3500
Connection ~ 6150 3050
Connection ~ 6150 3450
Text GLabel 5600 2950 2 51 Input ~ 0
p0_g2
Text GLabel 5600 2750 2 51 Input ~ 0
p0_g1
Text GLabel 5600 3250 2 51 Input ~ 0
row_D
Text GLabel 5600 3150 2 51 Input ~ 0
row_B
Text GLabel 5600 4350 2 51 Input ~ 0
row_B
Text GLabel 5600 4450 2 51 Input ~ 0
row_D
Text GLabel 5100 2750 0 51 Input ~ 0
p0_r1
Text GLabel 5100 3350 0 51 Input ~ 0
clock
Text GLabel 5100 3050 0 51 Input ~ 0
p0_b2
Text GLabel 5100 2850 0 51 Input ~ 0
p0_b1
Text GLabel 5100 2950 0 51 Input ~ 0
p0_r2
Text GLabel 5100 3450 0 51 Input ~ 0
OE
Text GLabel 5100 3950 0 51 Input ~ 0
p1_r1
Text GLabel 5100 4050 0 51 Input ~ 0
p1_b1
Text GLabel 5100 4150 0 51 Input ~ 0
p1_r2
Text GLabel 5100 4250 0 51 Input ~ 0
p1_b2
Text GLabel 5100 4550 0 51 Input ~ 0
clock
Text GLabel 5100 4650 0 51 Input ~ 0
OE
Text GLabel 5100 4450 0 51 Input ~ 0
row_C
Text GLabel 5100 4350 0 51 Input ~ 0
row_A
Text GLabel 5100 3150 0 51 Input ~ 0
row_A
Text GLabel 5100 3250 0 51 Input ~ 0
row_C
Text GLabel 5600 4550 2 51 Input ~ 0
strobe
Text GLabel 5600 3350 2 51 Input ~ 0
strobe
$EndSCHEMATC

27
demo-main.cc
View file

@ -1085,6 +1085,7 @@ static int usage(const char *progname) {
}
int main(int argc, char *argv[]) {
GPIO io;
bool as_daemon = false;
int runtime_seconds = -1;
int demo = -1;
@ -1099,6 +1100,31 @@ int main(int argc, char *argv[]) {
const char *demo_parameter = NULL;
#if 0
/** testing **/
if (!io.Init())
return 1;
uint32_t pulsed_pin = 1 << 18;
io.InitOutputs(pulsed_pin);
std::vector<int> spec;
int base = 200;
for (int i = 0; i < 11; ++i) {
spec.push_back(base << i);
}
int chosen = atoi(argv[1]);
if (chosen >= (int) spec.size())
chosen = spec.size() - 1;
fprintf(stderr, "Choosing %dns\n", spec[chosen]);
PinPulser *pulser = PinPulser::Create(&io, pulsed_pin, spec);
for (;;) {
pulser->SendPulse(chosen);
pulser->WaitPulseFinished();
}
return 0;
#endif
int opt;
while ((opt = getopt(argc, argv, "dlD:t:r:P:c:p:b:m:L")) != -1) {
switch (opt) {
@ -1192,7 +1218,6 @@ int main(int argc, char *argv[]) {
}
// Initialize GPIO pins. This might fail when we don't have permissions.
GPIO io;
if (!io.Init())
return 1;

BIN
img/active2-pcb.png
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Width:  |  Height:  |  Size: 598 KiB

4
include/canvas.h
View file

@ -20,11 +20,13 @@
namespace rgb_matrix {
// An interface for things a Canvas can do. The RGBMatrix implements this
// interface, so you can use it directly wherever a canvas is needed.
// However, this abstraction allows you to e.g. create delegating
//
// This abstraction also allows you to e.g. create delegating
// implementations that do a particular transformation, e.g. re-map
// pixels (as you might lay out the physical RGB matrix in a different way),
// compose images (OR, XOR, transparecy), scale, rotate, anti-alias or
// translate coordinates in a funky way.
//
// It is a good idea to have your applications use the concept of
// a Canvas to write the content to instead of directly using the RGBMatrix.
class Canvas {

21
include/gpio.h
View file

@ -40,10 +40,22 @@ class GPIO {
uint32_t InitOutputs(uint32_t outputs);
// Set the bits that are '1' in the output. Leave the rest untouched.
void SetBits(uint32_t value);
inline void SetBits(uint32_t value) {
if (!value) return;
*gpio_set_bits_ = value;
#ifdef RGB_SLOWDOWN_GPIO
*gpio_set_bits_ = value;
#endif
}
// Clear the bits that are '1' in the output. Leave the rest untouched.
void ClearBits(uint32_t value);
inline void ClearBits(uint32_t value) {
if (!value) return;
*gpio_clr_bits_ = value;
#ifdef RGB_SLOWDOWN_GPIO
*gpio_clr_bits_ = value;
#endif
}
// Write all the bits of "value" mentioned in "mask". Leave the rest untouched.
inline void WriteMaskedBits(uint32_t value, uint32_t mask) {
@ -58,6 +70,8 @@ class GPIO {
private:
uint32_t output_bits_;
volatile uint32_t *gpio_port_;
volatile uint32_t *gpio_set_bits_;
volatile uint32_t *gpio_clr_bits_;
};
// A PinPulser is a utility class that pulses a GPIO pin. There can be various
@ -77,6 +91,9 @@ public:
// Send a pulse with a given length (index into nano_wait_spec array).
virtual void SendPulse(int time_spec_number) = 0;
// If SendPulse() is asynchronously implemented, wait for pulse to finish.
virtual void WaitPulseFinished() {}
};
} // end namespace rgb_matrix

13
include/led-matrix.h
View file

@ -33,8 +33,13 @@ namespace internal { class Framebuffer; }
// The RGB matrix provides the framebuffer and the facilities to constantly
// update the LED matrix.
// This will provide a Canvas that represents the display with
//
// This implement the Canvas interface that represents the display with
// (32 * chained_displays)x(rows * parallel_displays) pixels.
//
// If can do multi-buffering using the CreateFrameCanvas() and SwapOnVSync()
// methods. This is useful for animations and to prevent tearing.
//
// If you arrange the panels in a different way in the physical space, write
// a delegating Canvas that does coordinate remapping, like the
// LargeSquare64x64Canvas in demo-main.cc.
@ -60,12 +65,14 @@ public:
int parallel_displays = 1);
virtual ~RGBMatrix();
// Set GPIO output if it was not set already in constructor (otherwise: no-op).
// Set GPIO output if it was not set already in constructor (otherwise: NoOp).
// Starts display refresh thread if this is the first setting.
void SetGPIO(GPIO *io);
// Set PWM bits used for output. Default is 11, but if you only deal with
// simple comic-colors, 1 might be sufficient. Lower require less CPU.
// limited comic-colors, 1 might be sufficient. Lower require less CPU and
// increases refresh-rate.
//
// Returns boolean to signify if value was within range.
//
// This sets the PWM bits for the current active FrameCanvas and future

36
lib/Makefile
View file

@ -11,6 +11,13 @@ TARGET=librgbmatrix.a
# and make again
###
# If you see that your display is inverse, you might have a matrix variant
# has uses inverse logic for the RGB bits. In that case: uncomment this.
#DEFINES+=-DINVERSE_RGB_DISPLAY_COLORS
# For curiosity reasons: uncomment to see refresh rate in terminal.
#DEFINES+=-DSHOW_REFRESH_RATE
# The signal can be too fast for some LED panels, in particular with newer
# (faster) Raspberry Pi 2s.
# In these cases, you want to make sure that
@ -25,27 +32,22 @@ TARGET=librgbmatrix.a
# the frame-rate.
#DEFINES+=-DRGB_SLOWDOWN_GPIO
# Uncomment to allow to use up to three parallel boards.
# This will only work on the plus models or RPi2 with 40 GPIO pins.
#
# This is useful in any case, _unless_ you have an older installation with
# classic cabeling of previous versions of this library or a
# Raspberry Pi 1, Revision 1 (very old).
#
# The reason why this is disabled by default is that it is not compatible with
# GPIO cabelings of previous versions of this software and thus is already
# wired up 'in the field'. Also it will drop support for the very first
# Raspberry Pi, Revision 1.
# Hence we leave this off for now for the least amount of surprise.
#DEFINES+=-DSUPPORT_MULTI_PARALLEL
# If you see that your display is inverse, you might have a matrix variant
# has uses inverse logic for the RGB bits. In that case: uncomment this.
#DEFINES+=-DINVERSE_RGB_DISPLAY_COLORS
# ------------ Pinout options; usually no change needed here --------------
# Uncomment the following line for Adafruit Matrix HAT gpio mappings
#DEFINES+=-DADAFRUIT_RGBMATRIX_HAT
# If you have used this library before July 2015 and have wired it up, then
# you need to define RGB_CLASSIC_PINOUT for your panel to work. The standard
# pinout changed so that we can make use of the PWM pin for much more stable
# timing. So even if you have the classic pinout, you might consider wiring
# up the new one (sorry for the inconvenience).
#DEFINES+=-DRGB_CLASSIC_PINOUT
# If you use RGB_CLASSIC_PINOUT and use Raspberry Pi 1, Revision A,
# this might be useful.
#DEFINES+=-DONLY_SINGLE_CHAIN
INCDIR=../include
CXXFLAGS=-Wall -O3 -g -fPIC $(DEFINES)

62
lib/framebuffer-internal.h
View file

@ -61,7 +61,7 @@ private:
inline uint16_t MapColor(uint8_t c);
const int rows_; // Number of rows. 16 or 32.
#ifdef SUPPORT_MULTI_PARALLEL
#ifndef ONLY_SINGLE_CHAIN
const int parallel_; // Parallel rows of chains. 1 or 2.
#endif
const int height_; // rows * parallel
@ -103,25 +103,24 @@ private:
uint32_t raw;
IoBits() : raw(0) {}
};
#else
#elif defined(RGB_CLASSIC_PINOUT)
// Classic pinout before July 2015. Consider upgrading to the new pinout.
union IoBits {
struct {
// This bitset reflects the GPIO mapping. The naming of the
// pins of type 'p0_r1' means 'first parallel chain, red-bit one'
#ifdef SUPPORT_MULTI_PARALLEL
unsigned int unused_0_1 : 2; // 0..1 (only on RPi 1, Revision 1)
unsigned int p2_g1 : 1; // 2 (masks SDA when parallel=3)
unsigned int p2_b1 : 1; // 3 (masks SCL when parallel=3)
#else
#ifdef ONLY_SINGLE_CHAIN
// The Revision1 and Revision2 boards have different GPIO mappings
// on the pins 2 and 3. Just use both interpretations.
// To keep the I2C pins free, we don't use these anymore.
// We keep this backward compatible unless SUPPORT_MULTI_PARALLEL
// is explicitly chosen.
unsigned int output_enable_rev1 : 1; // 0 (RPi 1, Revision 1)
unsigned int clock_rev1 : 1; // 1 (RPi 1, Revision 1)
unsigned int output_enable_rev2 : 1; // 2 (Pi1.Rev2; masks: I2C SDA)
unsigned int clock_rev2 : 1; // 3 (Pi1.Rev2; masks: I2C SCL)
#else
unsigned int unused_0_1 : 2; // 0..1 (only on RPi 1, Revision 1)
unsigned int p2_g1 : 1; // 2 (masks SDA when parallel=3)
unsigned int p2_b1 : 1; // 3 (masks SCL when parallel=3)
#endif
unsigned int strobe : 1; // 4
unsigned int p1_g1 : 1; // 5 (only on A+/B+/Pi2)
@ -153,6 +152,51 @@ private:
uint32_t raw;
IoBits() : raw(0) {}
};
#else
// Standard pinout since July 2015
// This uses the PWM pin to create the timing.
union IoBits {
struct {
// This bitset reflects the GPIO mapping. The naming of the
// pins of type 'p0_r1' means 'first parallel chain, red-bit one'
// GPIO Header-pos
unsigned int unused_0_1 : 2; // 0..1 (only on RPi 1, Revision 1)
unsigned int p2_g1 : 1; // 2 P1-03 (masks SDA when parallel=3)
unsigned int p2_b1 : 1; // 3 P1-05 (masks SCL when parallel=3)
unsigned int strobe : 1; // 4 P1-07
unsigned int p1_g1 : 1; // 5 P1-29 (only on A+/B+/Pi2)
unsigned int p1_b1 : 1; // 6 P1-31 (only on A+/B+/Pi2)
// TODO: be able to disable chain 0 for higher-pin RPis to gain SPI back.
unsigned int p0_b1 : 1; // 7 P1-26 (masks: SPI0_CE1)
unsigned int p0_r2 : 1; // 8 P1-24 (masks: SPI0_CE0)
unsigned int p0_g2 : 1; // 9 P1-21 (masks: SPI0_MISO
unsigned int p0_b2 : 1; // 10 P1-19 (masks: SPI0_MOSI)
unsigned int p0_r1 : 1; // 11 P1-23 (masks: SPI0_SCKL)
unsigned int p1_r1 : 1; // 12 P1-32 (only on A+/B+/Pi2)
unsigned int p1_g2 : 1; // 13 P1-33 (only on A+/B+/Pi2)
unsigned int p2_r1 : 1; // 14 P1-08 (masks TxD when parallel=3)
unsigned int unused_15 : 1; // 15 P1-10 (RxD) - kept free.
unsigned int p2_g2 : 1; // 16 P1-36 (only on A+/B+/Pi2)
unsigned int clock : 1; // 17 P1-11
unsigned int output_enable : 1; // 18 P1-12 (PWM pin: our timing)
unsigned int p1_r2 : 1; // 19 P1-35 (only on A+/B+/Pi2)
unsigned int p1_b2 : 1; // 20 P1-38 (only on A+/B+/Pi2)
unsigned int p2_b2 : 1; // 21 P1-40 (only on A+/B+/Pi2)
unsigned int a : 1; // 22 P1-15 // row bits.
unsigned int b : 1; // 23 P1-16
unsigned int c : 1; // 24 P1-18
unsigned int d : 1; // 25 P1-22
unsigned int p2_r2 : 1; // 26 P1-37 (only on A+/B+/Pi2)
unsigned int p0_g1 : 1; // 27 P1-13 (Not on RPi1, Rev1)
} bits;
uint32_t raw;
IoBits() : raw(0) {}
};
#endif
// The frame-buffer is organized in bitplanes.

46
lib/framebuffer.cc
View file

@ -33,29 +33,20 @@ enum {
kBitPlanes = 11 // maximum usable bitplanes.
};
static const long kBaseTimeNanos = 200;
static const long kBaseTimeNanos = 100;
// We need one global instance of a timing correct pulser. There are different
// implementations depending on the context.
static PinPulser *sOutputEnablePulser = NULL;
// The Adafruit HAT only supports one chain.
#if defined(ADAFRUIT_RGBMATRIX_HAT) && defined(SUPPORT_MULTI_PARALLEL)
# warning "Adafruit HAT doesn't map parallel chains. Disabling parallel chains."
# undef SUPPORT_MULTI_PARALLEL
#endif
// Only if SUPPORT_MULTI_PARALLEL is not defined, we allow classic wiring.
// Also, the Adafruit HAT does not do classic wiring either.
#if defined(SUPPORT_MULTI_PARALLEL) || defined(ADAFRUIT_RGBMATRIX_HAT)
# undef SUPPORT_CLASSIC_LED_GPIO_WIRING_
#else
# define SUPPORT_CLASSIC_LED_GPIO_WIRING_
#if defined(ADAFRUIT_RGBMATRIX_HAT)
# define ONLY_SINGLE_CHAIN 1
#endif
Framebuffer::Framebuffer(int rows, int columns, int parallel)
: rows_(rows),
#ifdef SUPPORT_MULTI_PARALLEL
#ifndef ONLY_SINGLE_CHAIN
parallel_(parallel),
#endif
height_(rows * parallel),
@ -66,10 +57,9 @@ Framebuffer::Framebuffer(int rows, int columns, int parallel)
Clear();
assert(rows_ <= 32);
assert(parallel >= 1 && parallel <= 3);
#ifndef SUPPORT_MULTI_PARALLEL
#ifdef ONLY_SINGLE_CHAIN
if (parallel > 1) {
fprintf(stderr, "In order for parallel > 1 to work, you need to "
"define SUPPORT_MULTI_PARALLEL in lib/Makefile.\n");
fprintf(stderr, "ONLY_SINGLE_CHAIN is defined, but parallel > 1 given\n");
assert(parallel == 1);
}
#endif
@ -87,7 +77,7 @@ Framebuffer::~Framebuffer() {
IoBits b;
b.raw = 0;
#ifdef SUPPORT_CLASSIC_LED_GPIO_WIRING_
#ifdef ONLY_SINGLE_CHAIN
b.bits.output_enable_rev1 = b.bits.output_enable_rev2 = 1;
b.bits.clock_rev1 = b.bits.clock_rev2 = 1;
#endif
@ -99,7 +89,7 @@ Framebuffer::~Framebuffer() {
b.bits.p0_r1 = b.bits.p0_g1 = b.bits.p0_b1 = 1;
b.bits.p0_r2 = b.bits.p0_g2 = b.bits.p0_b2 = 1;
#ifdef SUPPORT_MULTI_PARALLEL
#ifndef ONLY_SINGLE_CHAIN
if (parallel >= 2) {
b.bits.p1_r1 = b.bits.p1_g1 = b.bits.p1_b1 = 1;
b.bits.p1_r2 = b.bits.p1_g2 = b.bits.p1_b2 = 1;
@ -119,7 +109,7 @@ Framebuffer::~Framebuffer() {
// Now, set up the PinPulser for output enable.
IoBits output_enable_bits;
#ifdef SUPPORT_CLASSIC_LED_GPIO_WIRING_
#ifdef ONLY_SINGLE_CHAIN
output_enable_bits.bits.output_enable_rev1
= output_enable_bits.bits.output_enable_rev2 = 1;
#endif
@ -206,7 +196,7 @@ void Framebuffer::Fill(uint8_t r, uint8_t g, uint8_t b) {
plane_bits.bits.p0_g1 = plane_bits.bits.p0_g2 = (green & mask) == mask;
plane_bits.bits.p0_b1 = plane_bits.bits.p0_b2 = (blue & mask) == mask;
#ifdef SUPPORT_MULTI_PARALLEL
#ifndef ONLY_SINGLE_CHAIN
plane_bits.bits.p1_r1 = plane_bits.bits.p1_r2 =
plane_bits.bits.p2_r1 = plane_bits.bits.p2_r2 = (red & mask) == mask;
plane_bits.bits.p1_g1 = plane_bits.bits.p1_g2 =
@ -256,7 +246,7 @@ void Framebuffer::SetPixel(int x, int y,
bits += columns_;
}
}
#ifdef SUPPORT_MULTI_PARALLEL
#ifndef ONLY_SINGLE_CHAIN
} else if (y >= rows_ && y < 2 * rows_) {
// Parallel chain #2
if (y - rows_ < double_rows_) { // Upper sub-panel.
@ -308,7 +298,7 @@ void Framebuffer::DumpToMatrix(GPIO *io) {
= color_clk_mask.bits.p0_g2
= color_clk_mask.bits.p0_b2 = 1;
#ifdef SUPPORT_MULTI_PARALLEL
#ifndef ONLY_SINGLE_CHAIN
if (parallel_ >= 2) {
color_clk_mask.bits.p1_r1
= color_clk_mask.bits.p1_g1
@ -328,7 +318,7 @@ void Framebuffer::DumpToMatrix(GPIO *io) {
}
#endif
#ifdef SUPPORT_CLASSIC_LED_GPIO_WIRING_
#ifdef ONLY_SINGLE_CHAIN
color_clk_mask.bits.clock_rev1 = color_clk_mask.bits.clock_rev2 = 1;
#endif
color_clk_mask.bits.clock = 1;
@ -337,7 +327,7 @@ void Framebuffer::DumpToMatrix(GPIO *io) {
row_mask.bits.a = row_mask.bits.b = row_mask.bits.c = row_mask.bits.d = 1;
IoBits clock, strobe, row_address;
#ifdef SUPPORT_CLASSIC_LED_GPIO_WIRING_
#ifdef ONLY_SINGLE_CHAIN
clock.bits.clock_rev1 = clock.bits.clock_rev2 = 1;
#endif
clock.bits.clock = 1;
@ -356,8 +346,8 @@ void Framebuffer::DumpToMatrix(GPIO *io) {
// full PWM of one row before switching rows.
for (int b = kBitPlanes - pwm_to_show; b < kBitPlanes; ++b) {
IoBits *row_data = ValueAt(d_row, 0, b);
// We clock these in while we are dark. This actually increases the
// dark time, but we ignore that a bit.
// While the output enable is still on, we can already clock in the next
// data.
for (int col = 0; col < columns_; ++col) {
const IoBits &out = *row_data++;
io->WriteMaskedBits(out.raw, color_clk_mask.raw); // col + reset clock
@ -365,12 +355,16 @@ void Framebuffer::DumpToMatrix(GPIO *io) {
}
io->ClearBits(color_clk_mask.raw); // clock back to normal.
// OE of the previous row-data must be finished before strobe.
sOutputEnablePulser->WaitPulseFinished();
io->SetBits(strobe.raw); // Strobe in the previously clocked in row.
io->ClearBits(strobe.raw);
// Now switch on for the sleep time necessary for that bit-plane.
sOutputEnablePulser->SendPulse(b);
}
sOutputEnablePulser->WaitPulseFinished();
}
}
} // namespace internal

237
lib/gpio.cc
View file

@ -15,13 +15,6 @@
#include "gpio.h"
// Raspberry 1 and 2 have different base addresses for the periphery
#define BCM2708_PERI_BASE 0x20000000
#define BCM2709_PERI_BASE 0x3F000000
#define GPIO_REGISTER_OFFSET 0x200000
#define COUNTER_1Mhz_REGISTER_OFFSET 0x3000
#include <fcntl.h>
#include <stdio.h>
#include <stdlib.h>
@ -29,13 +22,57 @@
#include <sys/mman.h>
#include <time.h>
#include <unistd.h>
#include <assert.h>
// Raspberry 1 and 2 have different base addresses for the periphery
#define BCM2708_PERI_BASE 0x20000000
#define BCM2709_PERI_BASE 0x3F000000
#define GPIO_REGISTER_OFFSET 0x200000
#define COUNTER_1Mhz_REGISTER_OFFSET 0x3000
#define GPIO_PWM_BASE_OFFSET (GPIO_REGISTER_OFFSET + 0xC000)
#define GPIO_CLK_BASE_OFFSET 0x101000
#define REGISTER_BLOCK_SIZE (4*1024)
// GPIO setup macros. Always use INP_GPIO(x) before using OUT_GPIO(x) or SET_GPIO_ALT(x,y)
#define PWM_CTL 0
#define PWM_STA 1
#define PWM_FIFO 6
#define PWM_CTL_CLRF1 (1<<6) // CH1 Clear Fifo (1 Clears FIFO 0 has no effect)
#define PWM_CTL_USEF1 (1<<5) // CH1 Use Fifo (0=data reg transmit 1=Fifo used for transmission)
#define PWM_CTL_POLA1 (1<<4) // CH1 Polarity (0=(0=low 1=high) 1=(1=low 0=high)
#define PWM_CTL_SBIT1 (1<<3) // CH1 Silence Bit (state of output when 0 transmission takes place)
#define PWM_CTL_MODE1 (1<<1) // CH1 Mode (0=pwm 1=serialiser mode)
#define PWM_CTL_PWEN1 (1<<0) // CH1 Enable (0=disable 1=enable)
#define PWM_STA_EMPT1 (1<<1)
#define PWM_STA_FULL1 (1<<0)
#define CLK_PASSWD (0x5A<<24)
#define CLK_CTL_MASH(x)((x)<<9)
#define CLK_CTL_BUSY (1 <<7)
#define CLK_CTL_KILL (1 <<5)
#define CLK_CTL_ENAB (1 <<4)
#define CLK_CTL_SRC(x) ((x)<<0)
#define CLK_CTL_SRC_PLLD 6 /* 500.0 MHz */
#define CLK_DIV_DIVI(x) ((x)<<12)
#define CLK_DIV_DIVF(x) ((x)<< 0)
#define CLK_PWMCTL 40
#define CLK_PWMDIV 41
// We want to have the last word in the fifo free
#define MAX_PWM_BIT_USE 224
#define PWM_BASE_TIME_NS 2
// GPIO setup macros. Always use INP_GPIO(x) before using OUT_GPIO(x).
#define INP_GPIO(g) *(gpio_port_+((g)/10)) &= ~(7<<(((g)%10)*3))
#define OUT_GPIO(g) *(gpio_port_+((g)/10)) |= (1<<(((g)%10)*3))
#define SET_GPIO_ALT(g,a) *(gpio+(((g)/10))) |= (((a)<=3?(a)+4:(a)==4?3:2)<<(((g)%10)*3))
#define GPIO_SET *(gpio+7) // sets bits which are 1 ignores bits which are 0
#define GPIO_CLR *(gpio+10) // clears bits which are 1 ignores bits which are 0
@ -120,23 +157,11 @@ bool GPIO::Init() {
if (gpio_port_ == NULL) {
return false;
}
gpio_set_bits_ = gpio_port_ + (0x1C / sizeof(uint32_t));
gpio_clr_bits_ = gpio_port_ + (0x28 / sizeof(uint32_t));
return true;
}
void GPIO::SetBits(uint32_t value) {
gpio_port_[0x1C / sizeof(uint32_t)] = value;
#ifdef RGB_SLOWDOWN_GPIO
gpio_port_[0x1C / sizeof(uint32_t)] = value;
#endif
}
void GPIO::ClearBits(uint32_t value) {
gpio_port_[0x28 / sizeof(uint32_t)] = value;
#ifdef RGB_SLOWDOWN_GPIO
gpio_port_[0x28 / sizeof(uint32_t)] = value;
#endif
}
// --- PinPulser. Private implementation parts.
namespace {
// Manual timers.
@ -234,6 +259,166 @@ static void sleep_nanos_rpi_2(long nanos) {
asm("");
}
}
/*
TODO hardware timing: more CPU use and less refresh rate than 'regular'
- darker, i.e more setup time in-between (= more dark time) (less current use)
- lower refresh rate
*/
// A PinPulser that uses the PWM hardware to create accurate pulses.
// It only works on GPIO-18 though.
// Based in part on discussion found on
// https://www.raspberrypi.org/forums/viewtopic.php?t=67741&p=494768
class HardwarePinPulser : public PinPulser {
public:
static bool CanHandle(uint32_t gpio_mask) { return gpio_mask == (1 << 18); }
HardwarePinPulser(uint32_t pins, const std::vector<int> &specs)
: any_pulse_sent_(false), last_divider_(-1) {
assert(CanHandle(pins));
int base = specs[0];
for (size_t i = 0; i < specs.size(); ++i) {
#if 0
// Experimental. Exact pulses, but due to higher divider high
// recovery time and low refresh-rate.
if (specs[i] > MAX_PWM_BIT_USE * base) {
base <<= 5;
}
#endif
if (specs[i] <= MAX_PWM_BIT_USE * base) {
pwm_configs_.push_back(CreatePwmFifoConfig(base / PWM_BASE_TIME_NS,
specs[i] / base, specs[i]));
} else {
pwm_configs_.push_back(ConfigFromNanos(specs[i]));
}
}
// Get relevant registers
const bool isPI2 = IsRaspberryPi2();
volatile uint32_t *gpioReg = mmap_bcm_register(isPI2, GPIO_REGISTER_OFFSET);
pwm_reg_ = mmap_bcm_register(isPI2, GPIO_PWM_BASE_OFFSET);
clk_reg_ = mmap_bcm_register(isPI2, GPIO_CLK_BASE_OFFSET);
assert((clk_reg_ != NULL) && (pwm_reg_ != NULL)); // init error.
SetGPIOMode(gpioReg, 18, 2); // set GPIO 18 to PWM0 mode (Alternative 5)
SetPWMDivider(5);
}
virtual void SendPulse(int c) {
SetPWMDivider(pwm_configs_[c].clk_div);
//pwm_reg_[PWM_CTL] = PWM_CTL_USEF1 | PWM_CTL_MODE1 | PWM_CTL_PWEN1 | PWM_CTL_POLA1;
//pwm_reg_[PWM_STA] = -1; // clear status bits.
for (uint32_t *pattern = pwm_configs_[c].pwm_pattern; *pattern; ++pattern) {
pwm_reg_[PWM_FIFO] = *pattern;
}
pwm_reg_[PWM_FIFO] = 0;
any_pulse_sent_ = true;
}
virtual void WaitPulseFinished() {
if (!any_pulse_sent_) return;
// Wait until FIFO is empty.
pwm_reg_[PWM_FIFO] = 0;
while ((pwm_reg_[PWM_STA] & PWM_STA_EMPT1) == 0) {
usleep(1);
}
}
private:
struct pwm_fifo_config {
uint32_t clk_div;
uint32_t pwm_pattern[8]; // fifo length. We only fill up to the first 7
};
void SetGPIOMode(volatile uint32_t *gpioReg, unsigned gpio, unsigned mode) {
const int reg = gpio / 10;
const int mode_pos = (gpio % 10) * 3;
gpioReg[reg] = (gpioReg[reg] & ~(7 << mode_pos)) | (mode << mode_pos);
}
void SetPWMDivider(uint32_t divider) {
if (divider == last_divider_)
return;
// reset PWM clock
clk_reg_[CLK_PWMCTL] = CLK_PASSWD | CLK_CTL_KILL;
// set PWM clock source as 500 MHz PLLD
clk_reg_[CLK_PWMCTL] = CLK_PASSWD | CLK_CTL_SRC(CLK_CTL_SRC_PLLD);
// set PWM clock divider
clk_reg_[CLK_PWMDIV] = CLK_PASSWD | CLK_DIV_DIVI(divider) | CLK_DIV_DIVF(0);
// enable PWM clock
clk_reg_[CLK_PWMCTL] = CLK_PASSWD | CLK_CTL_ENAB | CLK_CTL_SRC(CLK_CTL_SRC_PLLD);
// set our mode
pwm_reg_[PWM_CTL] = PWM_CTL_USEF1 | PWM_CTL_MODE1 | PWM_CTL_PWEN1 | PWM_CTL_POLA1;
pwm_reg_[PWM_STA] = -1; // clear status bits.
usleep(1); // TODO: what is a good time here ?
//for (int i = 0; i < 300; ++i) { asm(""); } // Registers need a while to settle.
last_divider_ = divider;
}
pwm_fifo_config CreatePwmFifoConfig(int divider, int bit_count, int fyi_nanos) {
pwm_fifo_config result;
bzero(&result, sizeof(result));
#define PWM_DEBUG_PRINT 0
#if PWM_DEBUG_PRINT
fprintf(stderr, "%7dns div:%3d bits:%4d = %6dns (Δ%3d) ",
fyi_nanos, divider, bit_count,
divider * PWM_BASE_TIME_NS * bit_count,
divider * PWM_BASE_TIME_NS * bit_count - fyi_nanos);
#endif
assert(bit_count <= MAX_PWM_BIT_USE);
assert(divider < (1<<12)); // we only have 12 bits
result.clk_div = divider;
for (int i = 0; i < 8 && bit_count > 0; ++i) {
if (bit_count >= 32) {
result.pwm_pattern[i] = ~0;
bit_count -= 32;
} else {
// Remaining bits.
result.pwm_pattern[i] = ~((1u<<(32-bit_count))-1); // fill from top
break;
}
}
#if PWM_DEBUG_PRINT
for (int i = 0; i < 8; ++i) {
fprintf(stderr, "%08x ", result.pwm_pattern[i]);
}
fprintf(stderr, "\n");
#endif
#undef PWM_DEBUG_PRINT
return result;
}
pwm_fifo_config ConfigFromNanos(int nano_seconds) {
const int clock_loops = nano_seconds / PWM_BASE_TIME_NS;
// Find the smallest divider (=high time resolution) that fits
// in maximum allowed bits.
// We can sometimes get more exact values with higher dividers,
// however, they seem to impose a higher recovery rate.
int divider = (clock_loops / MAX_PWM_BIT_USE)+1;
if (divider < 2) divider = 2; // Can't be 1
int bit_count = clock_loops / divider;
return CreatePwmFifoConfig(divider, bit_count, nano_seconds);
}
private:
std::vector<pwm_fifo_config> pwm_configs_;
volatile uint32_t *pwm_reg_;
volatile uint32_t *clk_reg_;
bool any_pulse_sent_;
uint32_t last_divider_;
};
} // end anonymous namespace
// Public PinPulser factory
@ -241,7 +426,11 @@ PinPulser *PinPulser::Create(GPIO *io, uint32_t gpio_mask,
const std::vector<int> &nano_wait_spec) {
// The only implementation so far.
if (!Timers::Init()) return NULL;
return new TimerBasedPinPulser(io, gpio_mask, nano_wait_spec);
if (HardwarePinPulser::CanHandle(gpio_mask)) {
return new HardwarePinPulser(gpio_mask, nano_wait_spec);
} else {
return new TimerBasedPinPulser(io, gpio_mask, nano_wait_spec);
}
}
} // namespace rgb_matrix

8
lib/led-matrix.cc
View file

@ -23,9 +23,7 @@
#include <math.h>
#include <pthread.h>
#define SHOW_REFRESH_RATE 0
#if SHOW_REFRESH_RATE
#ifdef SHOW_REFRESH_RATE
# include <stdio.h>
# include <sys/time.h>
#endif
@ -52,7 +50,7 @@ public:
virtual void Run() {
while (running()) {
#if SHOW_REFRESH_RATE
#ifdef SHOW_REFRESH_RATE
struct timeval start, end;
gettimeofday(&start, NULL);
#endif
@ -68,7 +66,7 @@ public:
pthread_cond_signal(&frame_done_);
}
#if SHOW_REFRESH_RATE
#ifdef SHOW_REFRESH_RATE
gettimeofday(&end, NULL);
int64_t usec = ((uint64_t)end.tv_sec * 1000000 + end.tv_usec)
- ((int64_t)start.tv_sec * 1000000 + start.tv_usec);