o add project file.

This commit is contained in:
Henner Zeller 2015-03-01 22:10:17 -08:00
parent f07d746dbc
commit c4e573ebb5

View file

@ -0,0 +1,69 @@
update=Sun 01 Mar 2015 09:01:20 PM PST
version=1
last_client=pcbnew
[cvpcb]
version=1
NetIExt=net
[cvpcb/libraries]
EquName1=devcms
[eeschema]
version=1
LibDir=
NetFmtName=
RptD_X=0
RptD_Y=100
RptLab=1
LabSize=60
[eeschema/libraries]
LibName1=power
LibName2=device
LibName3=transistors
LibName4=conn
LibName5=linear
LibName6=regul
LibName7=74xx
LibName8=cmos4000
LibName9=adc-dac
LibName10=memory
LibName11=xilinx
LibName12=special
LibName13=microcontrollers
LibName14=dsp
LibName15=microchip
LibName16=analog_switches
LibName17=motorola
LibName18=texas
LibName19=intel
LibName20=audio
LibName21=interface
LibName22=digital-audio
LibName23=philips
LibName24=display
LibName25=cypress
LibName26=siliconi
LibName27=opto
LibName28=atmel
LibName29=contrib
LibName30=valves
[general]
version=1
[pcbnew]
version=1
PageLayoutDescrFile=
LastNetListRead=
UseCmpFile=1
PadDrill=0.6
PadDrillOvalY=0.6
PadSizeH=1.5
PadSizeV=1.5
PcbTextSizeV=1.5
PcbTextSizeH=1.5
PcbTextThickness=0.3
ModuleTextSizeV=1
ModuleTextSizeH=1
ModuleTextSizeThickness=0.15
SolderMaskClearance=0
SolderMaskMinWidth=0
DrawSegmentWidth=0.2
BoardOutlineThickness=0.09999999999999999
ModuleOutlineThickness=0.15